Polycrystalline silicon semiconductor having an amorphous silico

Batteries: thermoelectric and photoelectric – Photoelectric – Cells

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257 49, 257431, 257458, 257461, H01L 3106, H01L 310368, H01L 310392

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056675976

ABSTRACT:
A defect-free semiconductor device having a stacked layer structure formed on a substrate made of a material different from crystalline silicon, said stacked layer structure comprising an amorphous silicon layer on said substrate as a buffer layer and a polycrystalline silicon semiconductor active layer with a multilayered structure disposed on said amorphous silicon layer, said multilayered structure having at least a first polycrystalline silicon layer in non-junction forming contact with said amorphous silicon layer and a second polycrystalline silicon layer having a conductivity type opposite the conductivity type of said first polycrystalline silicon layer.

REFERENCES:
patent: 5238879 (1993-08-01), Plaettner
patent: 5246886 (1993-09-01), Sakai et al.

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