Nanotechnology – Specified use of nanostructure – For electronic or optoelectronic application
Reexamination Certificate
2007-06-05
2007-06-05
Gupta, Yogendra (Department: 1722)
Nanotechnology
Specified use of nanostructure
For electronic or optoelectronic application
C136S252000, C136S263000, C136S256000, C136S255000, C977S742000, C117S094000, C257S040000, C257S465000, C257S466000, C257S464000, C257S461000, C438S082000, C438S071000, C438S088000, C438S057000
Reexamination Certificate
active
10829928
ABSTRACT:
Methods for passivating crystalline grains in an active layer for an optoelectronic device and optoelectronic devices having active layers with passivated crystalline grains are disclosed. Crystalline grains of an active layer material and/or window layer material are formed within the nanotubes of an insulating nanotube template. The dimensions of the nanotubes correspond to the dimensions of a crystalline grain formed by the deposition technique used to form the grains. A majority of the surface area of these grains is in contact with the wall of the nanotube template rather than with other grains.
REFERENCES:
patent: 6221154 (2001-04-01), Lee et al.
patent: 6228243 (2001-05-01), Menezes
patent: 6716409 (2004-04-01), Hafner et al.
patent: 6743408 (2004-06-01), Lieber et al.
patent: 6762331 (2004-07-01), Hong et al.
patent: 6852920 (2005-02-01), Sager et al.
patent: 6887453 (2005-05-01), Brorson et al.
patent: 6946597 (2005-09-01), Sager et al.
patent: 6987071 (2006-01-01), Bollman et al.
patent: 7005391 (2006-02-01), Min et al.
patent: 2002/0185368 (2002-12-01), Hong et al.
patent: 2003/0175844 (2003-09-01), Nadler et al.
patent: 2003/0178580 (2003-09-01), Harnack et al.
patent: 2004/0084080 (2004-05-01), Sager et al.
patent: 2004/0175844 (2004-09-01), Yang et al.
patent: 2004/0202599 (2004-10-01), Xu et al.
patent: 2004/0250848 (2004-12-01), Sager et al.
patent: 2005/0036937 (2005-02-01), Brorson et al.
patent: 2005/0036939 (2005-02-01), Wong et al.
patent: 2005/0095422 (2005-05-01), Sager et al.
patent: 2005/0098205 (2005-05-01), Roscheisen et al.
patent: 2005/0100736 (2005-05-01), Hyldgaard et al.
patent: 2005/0121068 (2005-06-01), Sager et al.
patent: 2005/0183767 (2005-08-01), Yu et al.
patent: 2005/0183768 (2005-08-01), Roscheisen et al.
patent: 2005/0202684 (2005-09-01), Min et al.
patent: 2005/0229744 (2005-10-01), Kijima
patent: 2006/0169975 (2006-08-01), Noy et al.
patent: 2006/0174934 (2006-08-01), Sager et al.
patent: 2006/0219288 (2006-10-01), Tuttle
U.S. Appl. No. 10/290,119 entitled “Optoelectronic Device and Fabrication Methods”, filed Nov. 5, 2002.
U.S. Appl. No. 10/303,665 entitled “Molding Technique for Fabrication of Optoelectronic Devices”, filed Nov. 22, 2002.
U.S. Appl. No. 10/319,406 entitled “Nano-Architected/Assembled Solar Electricity Cell”, filed Dec. 6, 2002.
U.S. Appl. No. 10/719,042 entitled “Photovoltaic Device Fabricated by Anisotropic Etch Using Andoized Nanotube Template Etch Mask”, filed Nov. 21, 2003.
U.S. Appl. No. 10/781,081 entitled “3D Structured Photovoltaic Cells”, filed Feb. 17, 2004.
U.S. Appl. No. 10/782,017 entitled “Solution-Based Fabrication of Photovoltaic Cell”, filed Feb. 19, 2004.
Roscheisen Martin R.
Sager Brian M.
Gupta Yogendra
Isenberg Joshua D.
JDI Patent
Nanosolar, Inc.
Rao G. Nagesh
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