Abrading – Flexible-member tool – per se
Reexamination Certificate
2001-06-12
2003-12-16
Wilson, Lee D. (Department: 3724)
Abrading
Flexible-member tool, per se
C451S550000, C451S533000
Reexamination Certificate
active
06663480
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a polishing pad for polishing a semiconductor wafer or optical parts, and method for manufacturing the same, more particularly to a polishing pad which can efficiently polish with a minimum amount of chemicals by capsulating polishing abrasives, and a method for manufacturing the same.
BACKGROUND OF THE INVENTION
A process for forming a metal wiring, an insulating film and an interlayer wiring by various methods such as CVD, PVD and etching is one of the basic processes for manufacturing the semiconductor device. After each process is completed between such processes, a planarization process is performed for planarizing the processed surface.
Since the critical dimension (CD) of each conductive pattern becomes smaller as the semiconductor device is integrated as a multiplayer structure, the planarization process becomes an essential process. The planarization process is a broad concept including the enhancement of the planarity of the surface to be processed or the uniform removal of the thin film surface. However, especially, in that the planarization process is performed by selectively removing the projected portions in the irregular surface generated after insulating process or sputtering process for interlayer wiring, or in that the planarization process is performed by simultaneously and uniformly removing different materials of the metal wiring and the insulating film such as oxide and nitride, the planarization process is important in the largely integrated semiconductor device. In addition, it is meaningful in that the focal depth of light source can be ensured in an exposure process by virtue of the planarization process.
Up to now, in order to perform the planarization process, a variety of processes such as SOG (Spin on Glass) and etch-back have been performed. However, recently, to this ends, chemical mechanical polishing (CMP; hereinafter, it is referred to as CMP), in which mechanical polishing and chemical polishing are simultaneously performed, is widely performed. The chemical mechanical polishing is widely used in that the advantages of the existing mechanical polishing and chemical polishing can be simultaneously obtained.
Hereinafter, a typical CMP apparatus and its principle will be explained with reference to FIG.
1
.
As shown in
FIG. 1
, on the top surface of a rotating table
2
, a polishing pad
4
having a flat top surface for polishing is adhered. Over the top of the polishing pad
4
, a wafer carrier
8
to which a wafer
6
is adhered is installed to rub with the polishing pad
4
. The wafer carrier
8
is in close contact with the polishing pad
4
by constant force F so that both rotation and oscillation motions are performed. These motions polish and planarize the surface of the wafer
6
in combination with the rotation motion of the table
2
.
In the polishing process, by a slurry supplying mechanism
12
, slurries for polishing are supplied between the wafer
6
and the polishing pad
4
. In addition, after polishing of more than a constant duration, in order to secure the polishing properties of the polishing pad
4
, a conditioner
10
performs a conditioning function to the top surface of pad
4
.
The slurries supplied during the polishing process are a medium for transferring polishing abrasives and chemicals from or to the surface of the wafer to be processed. In the slurries, polishing abrasives are suspended in acidic or alkaline chemicals in accordance with the polishing target type. The polishing abrasives have the grain size of 100-1000 Å and the hardness similar to that of the wafer so that mechanical removing action can be performed, and generally occupy about 1-30 wt. % in the slurry. Fumed silica, colloidal silica or alumina is used as the polishing abrasives.
Generally, the polishing pad
4
formed of polyurethane foam is widely used. As shown in
FIG. 2
, the polishing pad
4
of polyurethane foam has a plurality of pores
4
a
and pore walls
4
b
contacted with the wafer to be polished. The pores
4
a
serves to supply the slurries between the pore walls
4
b
and the wafer
6
while retaining the supplied slurries in their interiors.
Generally, in the polishing pad, different properties are required according to the wafer type to be planarized. For example, a Si wafer should be processed with the surface roughness of 1 n m and corrected with the entire thickness variation of 1 m. Thus, it is important that the wafer should be simultaneously and uniformly processed. To this end, a soft pad following the entire shape of the wafer is generally used. That is, in case of the soft pad, since its deformation is relatively large, the entire wafer can be uniformly processed when the soft pad is pressed against the wafer.
On the other hand, in case of a device wafer on which conductive or nonconducting patterns are formed, since there are irregularities on its surface, a hard pad is generally used in order to make shape selectivity higher. When the hard pad is used, the shape selectivity becomes higher. However, since the entire deformation of the hard pad is small, it is difficult to uniformly correct the entire wafer.
Therefore, generally, in order to simultaneously realize the two parameters, the polishing pad employs a two-layer structure having upper and lower portions. That is, the upper portion is a hard pad portion for increasing the shape selectivity and the lower portion is a soft pad portion for correcting the entire uniformity.
The above existing polishing pad for CMP encountered the following problems.
First, in case of use of a polishing pad having pores, since particles of the processed target or polishing abrasives are cohered in the pores, the glazing phenomenon is generated in the pores. Once the glazing phenomenon occurs in the pores, the pores cannot smoothly perform its own function of supplying slurries between the pore walls and the wafer. Therefore, since the slurries are not uniformly supplied or are blocked not to be supplied, the uniform process cannot be expected. In continuously processing wafers in which semiconductor devices are integrated, the glazing phenomenon has a negative impact on the process repeatability and stability.
During the processing of the wafer by means of the polishing pad, the slurries should be continuously supplied. Free abrasives in the liquid slurries perform mechanical polishing. However, due to the free motion of the free abrasives, the wafer may be locally excessively processed. Then, according to the pattern shape, material, density and so forth of the wafer surface, different surface defects such as dishing or erosion are generated.
In addition, in a general CMP, the only 30-40% of slurries to be supplied take part in the surface processing in order to polish the wafer. Since the slurries should continuously be supplied during the polishing process, in order to actually use the only 30-40% of slurries, the remaining 60-70% slurries should be unnecessarily wasted. That is, there is a problem in that the wasted slurries are much more than the portion of the slurries to be actually used in the polishing. Thus, since the expensive slurries are excessively supplied, the production costs of semiconductor devices rise and the disposal costs of waste slurries increase. Of course, there is a further problem in that the increase of waste slurries has a negative impact on the environment.
SUMMARY OF THE INVENTION
The present invention is contemplated to solve the above problems. The object of the present invention is to provide a polishing pad that can continuously and stably polish a wafer by eliminating the glazing phenomenon in the polishing pad.
Another object of the present invention is to provide a polishing pad that can maximize polishing effects with a minimum amount of slurries upon polishing of a semiconductor wafer or optical parts.
A further object the present invention is to provide a polishing pad that is economically advantageous in view of the production and disposal costs of slurries by minimizing the usi
Jeong Hae-Do
Kim Ho-Youn
Kim Jae-Hong
Lee Ho-Sik
Lee Sang-Ick
Bacon & Thomas
Jeong Hae-Do
Wilson Lee D.
LandOfFree
Polishing pad for semiconductor and optical parts, and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Polishing pad for semiconductor and optical parts, and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Polishing pad for semiconductor and optical parts, and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3104464