Polished polyimide substrate

Optical waveguides – Integrated optical circuit

Reexamination Certificate

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Reexamination Certificate

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06807328

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to polished polyimide substrates and polymer laminate structures formed on those substrates, and more particularly, to polymer devices for optical and electronic applications.
BACKGROUND OF THE INVENTION
Optical waveguide devices are typically made on silicon substrates. It is desirable that materials used for optical waveguide devices exhibit certain optical, thermal and mechanical characteristics, besides low optical loss. Common silicon micromachining technologies include anisotropic chemical etching and reactive ion etching (RIE). Passive optical waveguides exhibiting acceptable losses between 0.1 and 10 dB/cm have been demonstrated in a number of materials, most notably optical grade glasses (silica) and PMMA and polystyrene polymers. The highest quality silica waveguides with very low losses of 0.1 dB/cm have been deposited on silicon wafers by the flame hydrolysis technique which yields good control over the index and thickness of the film but requires heating the porous glass layer to 1250° C. for consolidation. This high temperature perturbs the crystallographic micro-structure of silicon which affects its anisotropic chemical micromachining. Furthermore, the flame hydrolysis technique requires specialized and expensive equipment and involves the use of silane which is a toxic gas.
The fabrication of channel silica ridge waveguides requires deep RIE of several microns. Also vertical deep sidewalls and high aspect ratios, which are desirable in a micromechanical structure, such as accelerometer, can be achieved in silicon with deep RIE. However, RIE is an expensive process and requires use of high vacuum equipment which is prone to frequent failure. Furthermore, another problem with deep RIE is the erosion of the masking layer due to poor selectivity, which limits the etch depth in the silica film to the thickness of the masking layer, which is usually on the order of one micron. The selectivity of RIE can be improved with the proper selection and careful control of process parameters such as pressure and voltage. However, maintaining careful control over process parameters and finding a suitable masking material for a certain film can be limiting factors in the use of RIE.
It is desired in certain applications to incline the end faces of cantilevered film waveguides relative to the axis of the waveguide, especially at air gaps between cantilevered and fixed waveguides. This cannot be readily achieved with RIE because the electric field lines in a plasma, which define the trajectory of the energetic ions doing the etching, terminate perpendicularly to the wafer surface. Thus, the desired oblique walls at the end faces cannot be obtained with silicon micromachining technology.
Silicon micromachined cantilevers carrying film waveguides have made use of films such as silicon dioxide (silica) and nitride. However, there are problems associated with fabricating micro-structures from the bulk of silicon substrates, such as the undercutting of convex corners which alters the shape of micro-structures, e.g. the inertial mass at the end of a cantilever. This prevents the reproducible fabrication of microstructures with 90° corners such as accelerometers. This problem can be partially corrected with the use of proper corner compensation in the mask layout, however this requires significant experimentation by trial and error to determine the correct compensation for each mask design. Another problem with using silica films for waveguides in micro-mechanical applications which is not encountered in microelectronic processing is that thick films (up to 15 &mgr;m) are needed. The problem with such films is that they tend to crack and peel off due to the large residual stresses built-in during the deposition. Furthermore, the deposition of silica films is not compatible with silicon micromachining because it requires heating the wafer to a very high temperature which can affect the crystallinity of silicon on which anisotropic etching depends. Another drawback of high silica films is the necessity of deep RIE to form ridge waveguides, which is an expensive process and which is limited to etching thin films (below 1 &mgr;m) due to mask erosion.
Certain polymers have been used as waveguide materials. Low loss polymer waveguides have been most commonly achieved in poly-methyl-methacrylatc (PMMA) or polystyrene. However, polymers are affected by bases such as KOH or NaOH, which are used in anisotropic chemical silicon micromachining.
The use of polyimides on silicon presents problems in regards to wet and dry etching and to the mismatch in the coefficient of thermal expansion, so that polyimide films on silicon wafers tend to have limited utility in fabricating micromachined structures for optical waveguiding applications. For optical applications it is desired to cure polyimide films at temperatures not exceeding 250° C. in order to reduce optical losses.
Polymer film waveguides that are spun cast on planar substrates exhibit thermal and optical properties that are dependent on the deposition parameters. In particular, the degree of anisotropy in the film, such as the difference between the values of the index of refraction (birefringence), and the difference between the values of the coefficient of thermal expansion (CTE) along directions that are perpendicular and parallel to the surface of the substrate, respectively, depends on the level of stress that is induced in the film due to the mismatch between the coefficients of thermal expansion of the film and substrate. For mechanical ruggedness and in order to avoid peeling off or delamination of the film, it is desired to reduce the mismatch between the in-plane CTEs of the film and substrate as this reduces the level of stress at the interface between the film and substrate. For optical and especially wave guiding applications, it is desired to reduce the birefringence of the film. The in-plane CTE of a highly anisotropic polymeric film can be made as low as 6 ppm/° C., while its out-of-plane CTE can be as high as 150 ppm/° C. The same polymeric film can be made isotropic with its in-plane and out-of-plane CTE both about 50 ppm/° C. under different deposition conditions. When polymeric films are deposited on silicon wafers for electronic applications, the in-plane CTE of the film is made to match that of silicon, which is about 5 ppm/° C. While this reduces the stresses, it creates a highly anisotropic film, which is undesirable for optical wave guiding applications. Thus, it has not been possible to simultaneously reduce the stresses and deposit a polymeric film which exhibits the lowest anisotropy and birefringence on a silicon wafer.
The residual side wall angle of a wet etched air gap or slit is unpredictable due to the swelling when a developed film dries at elevated temperatures. This is aggravated in the case of a multilayered film wherein solvent attack at the interfaces between the layers results in uneven surfaces at the end faces of the film.
When a silicon wafer carrying a polymer film is cut or cleaved, the polymer film waveguide tends to lift off the cut edge of the wafer. The width of the lifted-off regions can extend up to 300 &mgr;m inward from the edge. This necessitates removing the entire lifted region of the film, such as for example by ablating with a laser to improve coupling of light in and out of the waveguide. However, this is problematic because it creates a relatively long step that the light must traverse between edge of the wafer and edge of the film. If this step is at the input edge of the waveguide where light is focused as a cone or wedge then a substantial portion of the light can be blocked off. Whereas if the step is at the output edge then it interferes with the collection of the light by a lens for feeding into a pick up fiber. This step is particularly problematic over silicon wafers. It was necessary to control the end face of a polymer channel waveguide within 5 &mgr;m from the cleaved silicon substrate edge in order to achieve acceptable couplin

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