Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1997-12-23
2000-07-25
Gulakowski, Randy
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
216 38, 216 84, 216 88, 216 89, 438693, 451 41, 451287, B24B 100, H01L 21461
Patent
active
060936517
ABSTRACT:
The present invention describes a method for creating a differential polish rate across a semiconductor wafer. The profile or topography of the semiconductor wafer is determined by locating the high points and low points of the wafer profile. The groove pattern of a polish pad is then adjusted to optimize the polish rate with respect to the particular wafer profile. By increasing the groove depth, width, and/or density of the groove pattern of the polish pad the polish rate may be increased in the areas that correspond to the high points of the wafer profile. By decreasing the groove depth, width, and/or density of the groove pattern of the polish pad the polish rate may be decreased in the areas that correspond to the low points of the wafer profile. A combination of these effects may be desirable in order to stabilize the polish rate across the wafer surface in order to improve the planarization of the polishing process.
REFERENCES:
patent: 5297364 (1994-03-01), Tuttle
patent: 5665249 (1997-09-01), Burke et al.
Andideh Ebrahim
Prince Matthew J.
Ahmed Shamim
Gulakowski Randy
Intel Corporation
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