Optical waveguides – Planar optical waveguide – Thin film optical waveguide
Reexamination Certificate
2002-06-26
2004-08-17
Glick, Edward J. (Department: 2882)
Optical waveguides
Planar optical waveguide
Thin film optical waveguide
C385S011000, C385S014000, C385S037000
Reexamination Certificate
active
06778750
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The described invention relates to the field of optical systems. In particular, the invention relates to polarization-insensitive planar lightwave circuits.
2. Description of Related Art
Planar lightwave circuits (PLCs) are systems that include, but are not limited to, waveguides, light sources, and/or detectors in the plane of the circuit. PLCs often have been based on silica-on-silicon (SOS) technology, but may alternatively be implemented using other technologies such as, but not limited to, silicon-on-insulator (SOI), compound semiconductor systems such as InGaAs and InP, polymers, etc.
FIG. 1
is a schematic diagram that shows a typical SOS architecture. A layer of lower cladding
12
is typically deposited onto a substrate
10
. A waveguide core layer
20
is deposited over the lower cladding
12
, and an upper cladding
24
is deposited over the waveguide core layer
20
. In one example, the substrate
10
is silicon, the lower cladding
12
is SiO
2
, the core layer
20
is SiO
2
doped with Germanium, and the upper cladding
24
is a borophosphosilicate glass (BPSG).
One issue with planar lightwave circuits, and SOS-based devices in particular, is the birefringence in the waveguides. Birefringence may arise due to thin-film stress and makes these devices polarization sensitive. Thus, the output of the PLC may vary dependent upon the polarization of the input light.
FIG. 2
is a schematic diagram that shows a prior art method of reducing the polarization sensitivity of a planar lightwave circuit, such as that described in
Polarization Mode Converter with Polyimide Half Waveplate in Silica
-
Based Planar Lightwave Circuits
, IEEE Photonics Technology Letter, Vol. 6, No 5, May 1994 by Inoue, Ohmori, Kawachi, Ando, Swada, and Takahashi. A groove
30
is cut into the middle of a planar lightwave circuit
32
, and a rectangular half waveplate is inserted into the groove. The half waveplate
40
is angled at a 45-degree angle with the plane of the substrate of the planar lightwave circuit. An optical input
50
traverses the first half of the PLC, and is mode converted by the half waveplate before traversing the second half of the PLC. This results in an output
52
of the PLC that is polarization insensitive.
However, due to lack of lateral optical confinement in the half waveplate, the mode profile of the optical signal expands and results in excess loss in the device. To minimize the loss, an extremely thin half waveplate is used. In one case, the half waveplate is approximately 15 microns thick. However, the reduced thickness of the half waveplate is limited due to fragility, thickness uniformity, and handling difficulties. Additionally, this solution is labor-intensive and is prone to loss at the interface.
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patent: 2002/0181870 (2002-12-01), Inoue et al.
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Y. Inoue et al., “Novel Birefringence Compensating A WG Design,” Optical Fiber Communication Conference, Technical Digest Postconference Edition, Trends in Optics and Photonics Series, Mar. 17-22, 2001, vol. 54, pp. WB4-1—WB4-3, XP: 010546335, USA.
Bhowmik Achintya K.
Vodrahalli Nagesh K.
Artman Thomas R
Glick Edward J.
Intel Corporation
Reif Kevin A.
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