Pointer processor and pointer processing scheme for SDH/SONET tr

Details Pointer processor and pointer processing scheme for SDH/SONET tr Pointer processor and pointer processing scheme for SDH/SONET tr

1996-06-27

1998-05-12

Olms, Douglas W.

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

H04J 306

Patent

active

057517207

ABSTRACT:
A pointer processor for use in an SDH/SONET transmission system, realizing a proper VC path management. A pointer interpreter constantly monitors 3X pairs of H1 and H2 bytes to contain a prescribed maximum size pointer AU-4-Xc that can possibly be received by the pointer processor, to obtain and hold an inside AU-size map indicating an occupation state of AU pointers on 3X pairs of H1 and H2 bytes, while generating and holding an assigned AU-size map indicating an assigned state of AU pointers on 3X pairs of H1 and H2 bytes according to an externally set AU pointer size, and compares these two AU-size maps. For a part of map where the inside AU-size map coincides with the assigned AU-size map, the pointer interpreter carries out size-fixed pointer interpretations in pointer sizes specified by the assigned AU-size map, and the pointer generator generates transmission pointers in forms of normal pointers or AISs in the pointer sizes specified by the assigned AU-size map according to the size-fixed pointer interpretations. For a part of map where the inside AU-size map does not coincide with the assigned AU-size map, the pointer generator generates AISs in the pointer sizes specified by the assigned AU-size map as the transmission pointers.

REFERENCES:
patent: 5331630 (1994-07-01), Fujita et al.
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patent: 5461622 (1995-10-01), Bleickardt et al.
patent: 5473611 (1995-12-01), Gilboa et al.
patent: 5528598 (1996-06-01), Ng
patent: 5535218 (1996-07-01), Ng et al.
patent: 5572515 (1996-11-01), Williamson et al.
Excerpt from ITU-T Recommendation GO-70X published May 1994, pp. 30-39.

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