Pointbus architecture and automatic sequential addressing...

Details Pointbus architecture and automatic sequential addressing... Pointbus architecture and automatic sequential addressing...

2006-07-18

2006-07-18

Barot, Bharat (Department: 2155)

Electrical computers and digital processing systems: multicomput

Computer-to-computer protocol implementing

C709S225000, C709S227000, C709S228000, C709S245000, C370S230000, C370S469000, C710S011000

Reexamination Certificate

active

07080150

ABSTRACT:
A protocol for configuring I/O devices is provided in accordance with the present invention. The protocol includes a first protocol for enabling at least one I/O module to receive network communications, and a second protocol for providing the network communications to the at least one I/O module. The first protocol enables at least one I/O module to enable at least one other I/O module to form an I/O group.

REFERENCES:
patent: 5416908 (1995-05-01), DiCarlo et al.
patent: 5564059 (1996-10-01), Maskovyak et al.
patent: 5675740 (1997-10-01), Heimsoth et al.
patent: 5745708 (1998-04-01), Weppler et al.
patent: 6044410 (2000-03-01), Maskovyak et al.
patent: 6081845 (2000-06-01), Kanemaki et al.
patent: 6145003 (2000-11-01), Sanu et al.
patent: 6148344 (2000-11-01), Bi
patent: 6484206 (2002-11-01), Crump et al.
patent: 6487218 (2002-11-01), Ludwig et al.
patent: 6724724 (2004-04-01), Swenson et al.

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