Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data transfer regulating
Reexamination Certificate
2011-01-04
2011-01-04
Flynn, Nathan (Department: 2454)
Electrical computers and digital processing systems: multicomput
Computer-to-computer protocol implementing
Computer-to-computer data transfer regulating
C709S230000, C709S236000, C370S229000, C370S235000, C370S486000
Reexamination Certificate
active
07865610
ABSTRACT:
A method and apparatus for improving the reliability in the synchronous streaming of data from a sender to multiple receivers, especially in networks having a limited bandwidth. The sender is configured to change the format of the data to be sent by segmenting the data into packets having maximum size, and identifying each packet with a message number. The transmit rate of the sender is adjusted according to the throughput bandwidth of the link so as to avoid congesting the link. Each receiver is configured to re-assemble the packets based upon the message number allocated to each packet, and re-create the data in the original format for being read by standard HDJRadio Exciters. The Receivers may also be configured to keep track of the packet numbers and request re-transmission of lost packets, using the ARQ (Automatic Retransmission Request) scheme.
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Intel — High Definition Audio Specification, Revision 1.0, Apr. 15, 2004.
Martin Scott
Schmid Philipp
Flynn Nathan
McDermott Will & Emery LLP
Nautel Limited
Park Jeong S
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