1979-11-20
1981-01-06
Clawson, Jr., Joseph E.
357 23, 357 30, 357 38, 357 51, 357 54, 357 58, 357 59, 357 86, H01L 29747
Patent
active
042440009
ABSTRACT:
A circuit for preventing a dV/dt erroneous operation of a PNPN semiconductor switch is replaced by a capacitance on the surface of a semiconductor substrate, a high resistance gate electrode. In other words, such a circuit is formed on the surface of the substrate by a slight modification of the basic design without decreasing the chip area and without isolating component elements.
REFERENCES:
patent: 3832732 (1974-08-01), Roberts
Hagimura Kazuo
Kato Kotaro
Mori Haruo
Ueda Jun
Clawson Jr. Joseph E.
Nippon Telegraph and Telephone Public Corporation
Oki Electric Industry Company, Ltd.
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