Plural transistor silicon on insulator structure with shared ele

Details Plural transistor silicon on insulator structure with shared ele Plural transistor silicon on insulator structure with shared ele

1990-08-01

1992-03-10

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

357 42, 3073032, H01L 2952

Patent

active

050953478

ABSTRACT:
A plural transistor structure uses shared electrodes to improve the degree of integration circuits such as SRAMs. The degree of integration is improved by forming a gate of a first transistor from a current electrode, such as a drain of a second transistor with the same region of semiconductor material. Furthermore, a gate of the second transistor can be formed from a drain of the first transistor with the same region of material which dramatically reduces the size of a memory cell latch.

REFERENCES:
patent: 4916504 (1990-04-01), Nakahara
patent: 4920392 (1990-04-01), Nishiura
patent: 4974041 (1990-11-01), Grinberg
patent: 4999691 (1991-03-01), Hsu et al.
Garnache, "Complementary FET Memory Cell" IBM T.D.B. vol. 18, No. 12, May 1976, pp. 3947-39488 (357/23.7).
Malhi et al, "Characteristics and Three-Dimensional Integration of MOSFET's in Small-Grain LPCVD Polycrystalline Silicon", IEEE T.E.C.D.vol. ED-32, No. 2, Feb. 1985.

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