Plural storage areas with different priorities in a processor sy

Details Plural storage areas with different priorities in a processor sy Plural storage areas with different priorities in a processor sy

1980-10-31

1983-08-30

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 1300

Patent

active

044020414

ABSTRACT:
There is disclosed apparatus for keeping two or more distinct groups of data separate from each other within a processor based system. The system employs at least two system areas, where one system area is assigned to have higher priority data than the other. By detecting the priority of a data operation, the lower priority system area is prevented by means of gates from having high priority data written into the lower priority system area. The higher priority system area can read data from the lower priority system area at all times and the lower priority system area can write data into the higher priority system area at all times.

REFERENCES:
patent: 4181940 (1980-01-01), Underwood et al.

Affiliated with

Also associated with

Rating

Plural storage areas with different priorities in a processor sy does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Plural storage areas with different priorities in a processor sy, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Plural storage areas with different priorities in a processor sy will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-908898