Plural phase locked loop circuit suitable for integrated circuit

Details Plural phase locked loop circuit suitable for integrated circuit Plural phase locked loop circuit suitable for integrated circuit

1991-05-23

1991-12-24

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Plural oscillators controlled

331 8, 331 17, 331 25, 331 34, 331113R, 331177R, H03L 707, H03L 7087, H03L 7099

Patent

active

050756397

ABSTRACT:
A PLL circuit suitable for fabrication into an integrated circuit includes: a first phase comparator for determining a phase difference between an input signal and a first feedback signal to produce a first phase difference signal in rsponse to the phase difference; a first loop filter for removing a high frequency constituent from the first phase difference signal; a first variable frequency oscillator which oscillates at a frequency which varies in response to an output of the first loop filter to produce the first feedback signal; a second phase comparator for determining a phase difference between a reference signal and a second feedback signal to produce a second phase difference signal in response to the phase difference; a second loop filter for removing a high frequency constituent from the second phase difference signal; a second variable frequency oscillator having substantially the same characteristics as those of the first variable frequency, oscillator which oscillates at a frequency which varies in response to an output of the second loop filter to produce the second feedback signal, and a signal adder for adding the outputs from the first and second filters and for applying the added signal to the first variable frequency oscillator.

REFERENCES:
patent: 4131861 (1978-12-01), Malaviya
patent: 4516084 (1985-05-01), Crowley
patent: 4567448 (1986-01-01), Ikeda
Robert R. Cordell et al., "A 50 MHz Phase-- and Frequency-Locked Loop" IEEE Journal of Solid-State Circuits, vol. SC-14, No. 6, pp. 1003-1010, Dec. 1979.

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