Plural-order sigma-delta analog-to-digital converters using both

Details Plural-order sigma-delta analog-to-digital converters using both Plural-order sigma-delta analog-to-digital converters using both

1990-04-23

1992-04-07

Pellinen, A. D.

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

341200, 341162, H03M 302, H03M 304

Patent

active

051032295

ABSTRACT:
An oversampling converter of a type using a plural-order, plural-stage sigma-delta modulator, the output signal to the decimating filter of which modulator has the quantization noise contribution of a number of its plurality of stages suppressed therein, uses single-bit quantization in those stages to help avoid problems of nonlinearity. Each other sigma-delta converter stage, the quantization noise of which appears in substantial amount in the converter output signal to the decimating filter, uses quantization having multiple-bit resolution to help increase the resolution of the oversampling converter overall.

REFERENCES:
patent: 4860012 (1989-08-01), Rich et al.
patent: 4862169 (1989-08-01), Van Bavel et al.
patent: 4876542 (1989-10-01), Van Bavel et al.
patent: 4876543 (1989-10-01), Van Bavel
"A Use of Limit Cycle Oscillators to Obtain Robust Analog to Digital Converters", J. C. Candy, IEEE Transactions on Communications, vol. COM-22, No. 3, pp. 298-305, Mar. 1974.
"Using Triangularly Weighted Interpolation to Get 13-Bit PCM from a Sigma-Delta Modulator", J. C. Candy et al., IEEE Transactions on Communications, vol. CM-24, No. 11, pp. 1268-1275, Nov. 1976.
"A Use of Double Integration in Sigma Delta Modulation", J. C. Candy, IEEE Transactions on Communications, vol. COM-33, No. 3, pp. 249-258, Mar. 1985.
"A 16-Bit Oversampling A-D Conversion Technology Using Triple Integration Noise Shaping", IEEE Journal of Solid State Circuits, vol. SC-22, No. 6, pp. 921-929, Dec. 1987, Y. Matsuya et al.
"A 16-Bit 160 kHz CMOS A/D Converter Using Sigma-Delta Modulation", Proceedings 1988, Custom Integrated Circuits Conference, pp. 21.2.1-21.2.4, Jun. 1988, M. Rebeschini et al.
"A 13-Bit ISDN-Band ADC Using Two-Stage Third Order Noise Shaping", Proceedings 1988 Custom Integrated Circuit Conference, pp. 21.2.1-21.2.4, Jun. 1988, L. Longo and M. A. Copeland.

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