Plural load power controller with time-shared processor

Details Plural load power controller with time-shared processor Plural load power controller with time-shared processor

1977-06-02

1978-09-19

Wise, Edward J.

Boots, shoes, and leggings

307 31, H02J 100, G06F 1520

Patent

active

041158601

ABSTRACT:
A power controller arrangement employs a digital processor to monitor and control plural loads, e.g., to monitor and maintain at prescribed levels the temperatures of plural missiles. During each load data processing cycle of operation, the processor presets a down-counter which governs load (e.g., missile heater) energizing power by duty factor modulation. The value preset into the counter is dependent upon any measured temperature error, and the then obtaining load power level.
In accordance with one aspect of the present invention, the modulation governing counter is periodically decrimented to progressively reduce power delivered to a load absent sufficiently frequent processor updating of the load-associated regulating circuitry. This provides fail-safe load passivation upon processor failure or overload.

REFERENCES:
patent: 3652838 (1972-03-01), Dillon et al.
patent: 3697768 (1972-10-01), Johnston
patent: 3842249 (1974-10-01), Geyer et al.
patent: 3982109 (1976-09-01), Klinck et al.
patent: 4034233 (1977-07-01), Leyde

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