Communications: electrical – Digital comparator systems
Patent
1974-12-06
1977-02-15
Chapnick, Melvin B.
Communications: electrical
Digital comparator systems
G06F 728, G06F 1300, G11C 700
Patent
active
040084620
ABSTRACT:
A microprogramming control system employing a plurality of low read rate control memories, for storing micro instructions, individually addressed in turn at a rate greater than the read rate of each memory. Each addressed control memory reads out a plurality of micro instructions. A selection circuit receives the plurality of micro instructions, in time shared fashion, read out in turn from each addressed control memory, then selects and gates a single micro instruction to a storage device. One portion of the selected micro instruction is designated as an address for the next micro instruction to be read out from the same control memory, and is accordingly gated to an address storage device at the input of the corresponding control memory.
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Chapnick Melvin B.
Fujitsu Ltd.
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