PLL with controlled VCO bias

Details PLL with controlled VCO bias PLL with controlled VCO bias

2008-03-11

2008-03-11

Richards, N. Drew (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S117000

Reexamination Certificate

active

07342426

ABSTRACT:
In some embodiments, a PLL with an output to provide a PLL output clock at a target frequency is provided. The PLL comprises a VCO to generate a clock to be used to generate the PLL output clock. Also provided is circuitry to maintain the VCO's bias level at a sufficient level if it is insufficient. Other embodiments may be disclosed herein.

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patent: 7061223 (2006-06-01), Boerstler et al.

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