PLL using asynchronously resettable divider to reduce lock time

Details PLL using asynchronously resettable divider to reduce lock time PLL using asynchronously resettable divider to reduce lock time

1991-10-04

1992-07-21

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 25, 331 27, 377107, 377119, H03L 7085, H03L 718

Patent

active

051326426

ABSTRACT:
An asynchronously resettable counter/divider (25) in a phase-locked loop (PLL) for a frequency synthesizer (12) reduces the lock-up time for the PLL by resetting the resettable counter/divider when the phase difference between the output signal from a VCO (20, 21) and a low frequency reference signal (30) exceeds a predetermined value.

REFERENCES:
patent: 4931748 (1990-06-01), McDermott et al.

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