PLL synthesizer circuit

Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular error voltage control

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Details

331 1A, 331 16, 331 18, 331 25, H03L 7089, H03L 717

Patent

active

051666448

ABSTRACT:
A PLL synthesizer circuit includes a lowpass filter including capacitors for restricting an output voltage of the lowpass filter, a charge pump circuit for controlling the output voltage of the lowpass filter by charging or discharging the capacitors of the lowpass filter, a voltage controlled oscillator for outputting an output signal having a frequency which is controlled by the output voltage of the lowpass filter, a frequency divider for frequency-dividing the output signal of the voltage controlled oscillator to output a comparison signal and having a variable frequency dividing ratio, a phase comparator for comparing a phase of a reference signal having a predetermined frequency and a phase of the comparison signal output from the frequency divider to output phase error information which indicates a phase lead and a phase lag of the comparison signal with respect to the reference signal, and a charge pump control circuit for forming control information based on the phase error information when switching a frequency of the output signal of the voltage controlled oscillator from a first frequency to a second frequency and for supplying the control information to the charge pump circuit. The charge pump circuit charges or discharges the capacitors of the lowpass filter independently of the reference signal based on the control information until the output signal of the voltage controlled oscillator reaches the second frequency, so as to raise or lower the output voltage of the lowpass filter depending on the charging or discharging. The output signal of the voltage controlled oscillator is used as an output signal of the PLL synthesizer circuit.

REFERENCES:
patent: 4987387 (1991-01-01), Kennedy et al.

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