PLL Synthesizer

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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455 76, 455 87, 331 16, 331 25, H03B 304

Patent

active

042258286

ABSTRACT:
A PLL synthesizer for a multi-channel civil band transceiver uses a D-flip-flop between a voltage controlled oscillator and a programmable divider which are parts of the loop. A reference signal is divided in a first divider to form a signal representing the frequency difference between adjacent transceiver channels which is applied to a phase comparator in the loop and the reference signal is frequency divided in a second divider to obtain a signal applied to the clock input of the D-flip-flop.

REFERENCES:
patent: 3401353 (1968-09-01), Hughes
patent: 3921095 (1975-11-01), Chu
patent: 4061973 (1977-12-01), Reimers et al.

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