PLL phase/frequency detector with fully differential output...

Details PLL phase/frequency detector with fully differential output... PLL phase/frequency detector with fully differential output...

2007-03-06

2007-03-06

Pascal, Robert (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Particular error voltage control

C327S157000, C327S536000

Reexamination Certificate

active

11038353

ABSTRACT:
Charge current in a charge pump of a phase locked loop is equalized by controlling one of the direct current sources with a feedback signal derived from the common mode voltage of a fully differential phase locked loop filter.

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Da Dalt, Nicola; Sandner, Christoph; “A Subpicosecond Jitter PLL for Clock Generation in 0.12-μm Digital CMOS”; IEEE Journal of Solid State Circuits; Jul. 2003; pp. 1275-1278; vol. 38 No. 7; IEEE Inc.; New York; USA.

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