Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate
1999-10-01
2002-07-16
Ton, My-Trang Nu (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
C327S159000
Reexamination Certificate
active
06420917
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to phase-locked loop filter circuits and, more particularly, to a loop filter with a switched-capacitor resistor.
BACKGROUND OF THE INVENTION
Phase-locked loop circuits are commonly used in circuits that require generation of a high-frequency periodic signal with the frequency of the signal being an accurate multiple of the frequency of a very stable and low-noise reference frequency signal. Phase-locked loop circuits also find applications where the phase of the output signal has to track the phase of the reference signal, thus the name phase-locked loop.
Phase-locked loop circuits are used for generating local oscillator signals in radio receivers and transmitters. The local oscillator signal is used for channel selection and thus is a multiple of a stable, low-noise and often temperature-compensated reference signal generator. Phase-locked loop circuits are also used for clock recovery applications in digital communication systems, disk-drive read-channels and the like. Phase-locked loop circuits are also used in frequency modulators and in the de-modulation of frequency-modulated signals. An overview of typical applications is discussed in “Monolithic Phase-Locked Loops and Clock Recovery Circuits, Theory and Design”, Behzad Razavi, IEEE Press, 1996.
A typical phase-locked loop circuit includes a loop filter connecting a phase detector to a voltage-controlled oscillator. The loop filter defines the dynamics of the phase-locking feedback loop such that certain stability criteria are fulfilled and the loop doesn't enter an oscillatory condition. In second and higher order phase-locked loop circuits, this stabilization is commonly achieved by inserting a resistor into the loop filter. The resistor generates thermal noise that amounts to a contribution to the phase noise spectrum of the phase-locked loop output signal. The loop filter resistor noise can dominate the overall phase noise in the neighborhood of the loop bandwidth.
The present invention is directed to overcoming one or more of the problems discussed above in a novel and simple manner.
SUMMARY OF THE INVENTION
In accordance with the invention there is provided a phase-locked loop circuit including a loop filter with a switched-capacitor resistor.
Broadly, there is disclosed herein a phase-locked loop circuit having improved phase noise characteristics including a voltage-controlled oscillator developing an oscillating output signal responsive to a voltage control input. A reference source provides a reference frequency signal. A phase detector is operatively connected to the voltage-controlled oscillator and the reference source developing an output proportional to a phase difference between the oscillating output signal and the reference frequency signal. A loop filter connects the phase detector output to the control voltage input. The loop filter includes a capacitor and a switching circuit. The switching circuit alternately connects the capacitor to the phase detector output and to ground.
It is a feature of the invention that the loop filter further comprises a second capacitor connected between the switching circuit and the phase detector output and optionally an additional capacitor connected between the phase detector output and ground.
It is another feature of the invention that the switching circuit comprises a first transistor connecting the capacitor to the phase detector output and a second transistor connecting the capacitor to ground. The switching circuit further comprises a non-overlapping clock generator circuit for controlling the first and second transistors. The clock generator circuit operates at a frequency above a loop bandwidth of the phase-locked loop circuit.
It is an additional feature of the invention that the phase detector comprises a phase frequency detector. The phase detector also includes a charge pump circuit and the loop filter converts current pulses from the charge pump circuit into a voltage at the voltage control input. The phase detector includes a pair of edge-triggered resettable flip-flops and the oscillating output signal and the reference frequency signal are clock signals for the flip-flops and the flip-flops drive the charge pump circuit.
It is yet another feature of the invention to provide dividers connecting the oscillating output signal and the reference frequency signal to the phase detector.
There is disclosed in accordance with another aspect of the invention a phase-locked loop circuit including a voltage-controlled oscillator developing an oscillating output signal responsive to a voltage control input. A reference source provides a reference frequency signal. A phase frequency detector is operatively connected to the voltage-controlled oscillator and the reference source developing an output having positive or negative current pulses having widths proportional to a phase difference between the oscillating output signal and the reference frequency signal. A loop filter connects the phase detector output to the voltage control input. The loop filter includes an integrator converting current pulses into a voltage at the voltage control input and comprising a capacitor and a switching circuit. The switching circuit alternately connects the capacitor to the phase detector output and to ground.
Further features and advantages of the invention will be readily apparent from the specification and from the drawings.
REFERENCES:
patent: 5055803 (1991-10-01), Hietala
patent: 5774023 (1998-06-01), Irwin
patent: 5942949 (1999-08-01), Wilson et al.
patent: 5963099 (1999-10-01), Nagoya et al.
Matsuura Shoji; “PLL Circuit”Patent Abstracts of Japan, Publication No. 06291644, vol. 013, No. 023, Jan. 19, 1989.
Nishioka Akihiko, “Clock Extracting Circuit”,Patent Abstracts of Japan, Publication No. 63227120, Sep. 21, 1988.
Asta, D., et al., “Analysis of a Hubrid Analog/Switched-Capacitor Phase-Locked Loop”,IEEE Transactions on Circuits and Systems, vol. 37, No. 2, Feb. 1, 1990.
D. J. L. Lewis Shrewsbury, “Switched Capacitor Filters for PLL”,Electronic Engineering, vol. 55, No. 677, May, 1983.
Coats & Bennett P.L.L.C.
Ericsson Inc.
Nu Ton My-Trang
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