PLL frequency synthesizer using plural phase comparisons

Oscillators – Automatic frequency stabilization using a phase or frequency... – Plural a.f.s. for a single oscillator

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331 17, 331 25, H03L 7087, H03L 718

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active

053652029

ABSTRACT:
In a phase locked loop frequency synthesizer having multiple feedback loops, a reference phase signal is developed into two signals having a frequency twice as high as the reference frequency and the phase difference of the two signals is a half wavelength. The output frequency produced by a voltage-controlled oscillator is divided by two frequency dividers in accordance with predetermined frequency division factors. Each of the frequency-divided signals and each of the developed signals are subjected to phase comparison in pairs. A voltage signal corresponding to the phase differences is fed through a low-pass filter and supplied to the voltage-controlled oscillator.

REFERENCES:
patent: 3571743 (1971-03-01), Menkes
patent: 4888564 (1989-12-01), Ishigaki
patent: 5113152 (1992-05-01), Norimatsu

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