PLL frequency synthesizer using plural phase comparators and fre

Oscillators – Automatic frequency stabilization using a phase or frequency... – Plural a.f.s. for a single oscillator

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331 14, 331 25, 331 1A, H03L 7087, H03L 718

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active

058567615

ABSTRACT:
A PLL frequency synthesizer for realizing high-speed operation in a frequency synthesizer having a small channel interval .DELTA.f. There are provided n-number of phase comparators, feedback frequency dividers, and reference signal frequency dividers, and a timing generating section for outputting a signal causing each of the frequency dividers to become enabled every cycle of n.times..DELTA.f. An OR gate for superposing each phase comparison signal. Each phase comparison signal is sent to a charge pump after a cycle of n.times..DELTA.f, and the reference frequency is capable of being raised to n times the channel interval .DELTA.f. Further, a control section monitors lock detection of each phase comparator, thus implementing voltage control of each phase comparison system. When the synthesizer arrives at convergence-synchronization, the power sources to all systems are turned OFF except for the phase comparison system initiating the lock signal.

REFERENCES:
patent: 3571743 (1971-03-01), Menkes
patent: 5254959 (1993-10-01), Wunsch
patent: 5521948 (1996-05-01), Takeuchi
patent: 5550515 (1996-08-01), Liang et al.
Adachi et al., "High-Speed Frequency Switching Synthesizer Using Fractional N Phase Locked Loop", Transactions of the IEICE C-I, vol. J76-C-I, No. 11 Nov. 1993, pp. 445-452.

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