PLL frequency synthesizer architecture for low phase noise...

Details PLL frequency synthesizer architecture for low phase noise... PLL frequency synthesizer architecture for low phase noise...

2008-01-29

2008-01-29

Le, Lana (Department: 2618)

Telecommunications

Transmitter and receiver at same station

With frequency stabilization

C455S118000, C455S084000, C455S087000, C455S086000

Reexamination Certificate

active

11039116

ABSTRACT:
A frequency synthesizer for use in a transceiver generates a relatively high reference frequency with fine frequency resolution and low in-band phase noise by using a digital processor to generate a digital reference signal at a finely-tuned reference frequency. A Digital-to-Analog Converter (DAC) converts the digital reference signal to an analog reference signal, and a low pass filter filters the analog reference signal to produce a filtered analog reference signal. The frequency synthesizer further includes a phase locked loop for up-converting the filtered analog reference signal from an IF signal to an RF signal.

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