PLL frequency synthesizer

Details PLL frequency synthesizer PLL frequency synthesizer

2007-02-27

2007-02-27

Urban, Edward F. (Department: 2618)

Telecommunications

Receiver or analog modulated signal frequency converter

Local control of receiver operation

C455S209000, C455S264000, C375S376000, C331S025000

Reexamination Certificate

active

10026548

ABSTRACT:
A PLL frequency synthesizer suitable for improving even a spurious characteristic in a lock state while ensuring a high-speed lockup characteristic to thereby implement satisfactoy communication quality includes a switch circuit interposed between a low-pass filter circuit and a voltage-controlled oscillator controlled based on a control signal to open/close control a feedback loop lying between the low-pass filter circuit and the voltage-controlled oscillator. The switch circuit is opened according to a path-opening instruction of a feedback loop based on the control signal to open the feedback loop, thereby stopping the operation of the feedback loop. If this stop operation is controlled according to the control signal so as to he carried out during a period in which a pseudo correction pulse is outputted from a charge pump circuit for each phase comparison cycle of a phase comparator, then spurious generation incident to the pseudo correction pulse can be suppressed.

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Patent Abstract of Japan, vol. 0175, No. 99, Nov. 2, 1993 & JP 5 183432 A, Jul. 23, 1993.

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