PLL frequency synthesizer

Details PLL frequency synthesizer PLL frequency synthesizer

1998-09-17

2002-08-27

Lee, Benny (Department: 2817)

Oscillators

Beat frequency

With particular signal combining means

C331S074000, C331S076000, C327S105000, C327S156000

Reexamination Certificate

active

06441692

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a PLL frequency synthesizer which is useful in a portable telephone or the like, and particularly to a PLL frequency synthesizer which can realize high frequency switching.
2. Description of the Prior Art
A PLL frequency synthesizer is a circuit which uses a feedback loop for synchronization in frequency and phase with a certain reference frequency signal and generates a signal of a target frequency by multiplying the reference frequency signal or by combining the reference frequency signal with another reference frequency signal.
In general, in a PLL frequency synthesizer, the fundamental wave of a voltage-controlled oscillator which is an external output is fed back, and hence the frequency interval of the external output coincides with the frequency of a reference signal. Herein, a frequency interval is, for example, an interval of a frequency between adjacent channels.
FIG. 5
shows an example of a PLL frequency synthesizer of the prior art. In the figure,
501
designates a phase comparator,
502
designates a loop filter,
503
designates a voltage-controlled oscillator, and
504
designates a variable frequency divider. The phase comparator
501
compares the phase of a reference signal with that of an output of the variable frequency divider
504
. The loop filter
502
smooths an output of the phase comparator
501
. The voltage-controlled oscillator
503
changes the frequency of an output in accordance with a control signal output from the loop filter
502
. The variable frequency divider
504
divides the frequency of the fundamental wave of an output of the voltage-controlled oscillator
503
.
In the case of the PLL frequency synthesizer such as shown in
FIG. 5
, when the cut-off frequency of the loop filter
502
is raised, the frequency switch time of the output of the voltage-controlled oscillator
501
is shortened.
In order to suppress a reference leakage which is a phenomenon that a reference signal leaks into an external output, or for some purposes, it is necessary to set a cut-off frequency of the loop filter to be lower than the frequency of the reference signal. On the other hand, the frequency interval of the external output depends on a system which uses the PLL frequency synthesizer. In the PLL frequency synthesizer having the configuration as shown in
FIG. 5
, therefore, the frequency of the reference signal also is determined. Accordingly, there exists a limitation in an increase of the speed of the PLL frequency synthesizer.
SUMMARY OF THE INVENTION
The invention has been conducted in view of the above-mentioned problems of a PLL frequency synthesizer of the prior art. It is an object of the invention to provide a high-speed PLL frequency synthesizer in which the frequency of a reference signal can be made larger than a frequency interval of an external output by a simple configuration.
In order to solve the above-mentioned problem, the PLL frequency synthesizer of the invention has a configuration in which an n-th harmonic of an output of a voltage-controlled oscillator is fed back. With this configuration, the frequency of a reference signal is n times a frequency interval of an external output which is the fundamental wave of the voltage-controlled oscillator. Thus, also an upper limit of a cut-off frequency of a loop filter is raised by a corresponding amount. As a result, it is possible to shorten a frequency switch time as compared with the prior art.


REFERENCES:
patent: 3662287 (1972-05-01), Egbert et al.
patent: 5568098 (1996-10-01), Horie et al.
patent: 6094158 (2000-07-01), Williams
patent: 2812158 (1979-09-01), None
patent: 0550516 (1992-08-01), None
patent: 0771076 (1997-05-01), None
patent: 01032532 (1989-02-01), None
patent: 05327493 (1993-12-01), None
patent: 07183804 (1995-07-01), None
patent: 08307262 (1996-11-01), None
Wolaver,Dan H., Phase-Locked Loop CIrcuit. Design, 1991, p. 199.*
Crawford, James A. , Frequency Synthesizer Design Handbbok, 1994, p. 288.*
JP 08307262 A, Nov. 22, 1996, abstracts XP002084564, Database WPI, Setion EI, week 9706, Derwent Publication Ltd., London, GB.

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