PLL clock generator, optical disc drive and method for...

Details PLL clock generator, optical disc drive and method for... PLL clock generator, optical disc drive and method for...

2004-04-14

2008-03-04

Psitos, Aristotelis M. (Department: 2627)

Dynamic information storage or retrieval

Control of storage or retrieval operation by a control...

Control of information signal processing channel

C331S016000, C327S159000

Reexamination Certificate

active

07339861

ABSTRACT:
A PLL clock generator generates an output signal with a frequency N times (where N≧1) as high as that of an input signal. The clock generator includes: a frequency divider for dividing the frequency of a clock signal by N so as to output a frequency-divided clock signal; a phase comparator for detecting a phase difference between the input signal and the output signal of the frequency divider so as to output a phase difference signal including information representing the phase difference; a LPF for smoothing the phase difference signal; a VCO for generating the clock signal, of which the frequency is determined by the output of the LPF, and outputting the clock signal to the frequency divider; and a phase shifter for shifting the phase of the output signal of the frequency divider in accordance with the phase difference signal.

REFERENCES:
patent: 6236629 (2001-05-01), Hisakado et al.
patent: 6661294 (2003-12-01), Terashima et al.
patent: 7012865 (2006-03-01), Deguchi et al.
patent: 2003/0002406 (2003-01-01), Deguchi et al.
patent: 2003/0062957 (2003-04-01), Terashima et al.
patent: 2004/0027940 (2004-02-01), Minamino et al.
patent: 10-228730 (1998-08-01), None

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