PLL circuit with simulation components to reduce phase offset

Details PLL circuit with simulation components to reduce phase offset PLL circuit with simulation components to reduce phase offset

2006-06-13

2006-06-13

Nguyen, Minh (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C331S017000

Reexamination Certificate

active

07061290

ABSTRACT:
A PLL circuit in which a phase offset between a reference clock and a feedback clock is reduced. PLL circuit10includes a dummy phase comparator16that simulates a phase comparator11and has a pair of comparison inputs to which the reference clock is input, a dummy charge pump17that simulates a charge pump12and causes an output voltage thereof to rise or fall based on an up signal or a down signal output from the dummy phase comparator16, and an amplifier19for detecting a difference between the output voltage of the charge pump12and the output voltage of the dummy charge pump17. The PLL circuit controls the pulse widths of up and down signals of both of the phase comparator11and the dummy phase comparator16based on the output voltage of the amplifier19.

REFERENCES:
patent: 5166641 (1992-11-01), Davis et al.
patent: 5508660 (1996-04-01), Gersbach et al.
patent: 6043715 (2000-03-01), Bailey et al.
patent: 6172571 (2001-01-01), Moyal et al.
patent: 6608511 (2003-08-01), Hsu
patent: 2002-232290 (2002-08-01), None
patent: 2003-188720 (2003-07-01), None

Affiliated with

Also associated with

Rating

PLL circuit with simulation components to reduce phase offset does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with PLL circuit with simulation components to reduce phase offset, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and PLL circuit with simulation components to reduce phase offset will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3704010