PLL circuit with reduced response variance due to manufacturing

Details PLL circuit with reduced response variance due to manufacturing PLL circuit with reduced response variance due to manufacturing

1997-03-27

1999-11-02

Ton, My-Trang Nu

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

331 2, H03L 706

Patent

active

059778067

ABSTRACT:
Variations in the response band of a PLL circuit due to manufacturing variations of the sensitivity of a voltage control oscillator are suppressed. With respect to an original PLL circuit which generates a clock signal having a predetermined frequency in accordance with an input signal, a dummy PLL circuit having a voltage control oscillator having characteristics substantially similar to those of a voltage control oscillator within the original PLL circuit is provided. By controlling the output current of a charge pump circuit within the original PLL circuit on the basis of a locked voltage of the voltage control oscillator within the dummy PLL circuit, the gain of the original PLL circuit is controlled.

REFERENCES:
patent: 5144254 (1992-09-01), Wilke
patent: 5422604 (1995-06-01), Jokura
patent: 5566204 (1996-10-01), Kardontchik et al.
patent: 5610558 (1997-03-01), Mittel et al.
patent: 5657359 (1997-08-01), Sakae et al.

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