PLL circuit with deadlock detection circuit

Details PLL circuit with deadlock detection circuit PLL circuit with deadlock detection circuit

2008-01-29

2008-01-29

Pascal, Robert (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Plural a.f.s. for a single oscillator

C331S016000

Reexamination Certificate

active

11280169

ABSTRACT:
Disclosed is a PLL circuit including a deadlock detection circuit includes a counter circuit for counting a clock signal. In a deadlock state, the deadlock detection circuit outputs a deadlock detection signal responsive to an output signal from the counter circuit when the counter circuit has counted a preset number of the clock signal. The deadlock detection signal serves to release the PLL circuit from the dead lock. During the normal operation, the counter circuit does not impart noise to the PLL circuit.

REFERENCES:
patent: 3659286 (1972-04-01), Perkins et al.
patent: 5220293 (1993-06-01), Rogers
patent: 5389898 (1995-02-01), Taketoshi et al.
patent: 5864572 (1999-01-01), Bhagwan
patent: 6700943 (2004-03-01), Miller
patent: 60-247330 (1985-12-01), None
patent: 11-103249 (1999-04-01), None
European Search Report dated Feb. 2, 2006.

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