PLL circuit having reduced pull-in time

Details PLL circuit having reduced pull-in time PLL circuit having reduced pull-in time

2005-12-01

2009-06-23

Pascal, Robert (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Tuning compensation

C331S017000, C327S157000

Reexamination Certificate

active

07551037

ABSTRACT:
The PLL circuit of the present invention includes a voltage-controlled oscillator, a loop filter, and a charge pump which controls a voltage of the loop filter while the voltage-controlled oscillator is not oscillating. Therefore, it is possible, even while the voltage-controlled oscillator is not oscillating, to control a voltage for the charge pump so that it is equal to a voltage when the voltage-controlled oscillator is oscillating at a predetermined frequency. Accordingly, by the loop filter outputting a voltage signal to the voltage-controlled oscillator when the PLL circuit is turned on, the pull-in time can be shortened.

REFERENCES:
patent: 5477194 (1995-12-01), Nagakura
patent: 5877701 (1999-03-01), Nagakura
patent: 6643347 (2003-11-01), Ohishi
patent: 6724265 (2004-04-01), Humphreys
patent: 6867655 (2005-03-01), McCarthy
patent: 6998922 (2006-02-01), Jensen et al.
patent: 7106140 (2006-09-01), Mone
patent: 2006/0055466 (2006-03-01), Hirano et al.
patent: 7-030413 (1995-01-01), None
patent: 08-125527 (1996-05-01), None
patent: 08-125527 (1996-05-01), None
patent: 08-288843 (1996-11-01), None
patent: 11-027143 (1999-01-01), None
patent: 11-220390 (1999-08-01), None
patent: 11-308104 (1999-11-01), None
patent: 2002-252561 (2002-09-01), None
patent: 2002-319861 (2002-10-01), None
patent: 2002-88545 (2002-11-01), None

Affiliated with

Also associated with

Rating

PLL circuit having reduced pull-in time does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with PLL circuit having reduced pull-in time, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and PLL circuit having reduced pull-in time will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4123506