PLL circuit having a multiloop, and FM receiving method and appa

Details PLL circuit having a multiloop, and FM receiving method and appa PLL circuit having a multiloop, and FM receiving method and appa

1994-04-13

1996-05-14

Pham, Chi H.

Telecommunications

Receiver or analog modulated signal frequency converter

Local control of receiver operation

455264, 455316, 331 11, 331 18, H04B 116, H03L 708, H03L 7099

Patent

active

055176852

ABSTRACT:
The PLL circuit provides both the advantages of analog phase control, in which a good C/N ratio can be realized, and the advantages of digital phase control, in which broad-band lock can be performed. A multi-channel FM receiving method and apparatus are able to utilize the PLL circuit to reduce the influence of the leakage occurring among input signals and suppress image disturbance. One PLL circuit includes: a VCO; a pre-scaler for dividing a feedback signal obtained from the VCO; a first distributor for distributing the feedback signal to send first and second digital feedback signals; a second distributor for distributing a reference signal to send a digital reference signal and an analog reference signal; a digital phase comparator for comparing the digital reference signal and the first digital feedback signal with each other to send a digital phase error signal; a charge pump; a mixer for adding the digital phase error signal to an analog phase error signal, which is obtained by comparing the analog reference signal with the second digital feedback signal to send a composite phase error signal; and a low-pass filter for eliminating high frequency components from the composite phase error signal to input the resultant signal to the VCO.

REFERENCES:
patent: 3792478 (1974-02-01), Parquier et al.
patent: 4581643 (1986-04-01), Carlson
patent: 4661995 (1987-04-01), Kashiwagi
patent: 4888564 (1989-12-01), Ishigaki
patent: 4940952 (1990-07-01), Kegasa
patent: 4970474 (1990-11-01), Kennedy et al.
patent: 4977613 (1990-12-01), Holcomb, Sr. et al.
patent: 5119043 (1992-06-01), Borwn et al.
patent: 5157341 (1992-10-01), Fobbester et al.
patent: 5181115 (1993-01-01), Flamm et al.
Thorpe, "Designing a Communications Receiver", Electronics & Wireless World, vol. 93, No. 1614, Apr. 1987, Sutton, Surrey, Great Britain, pp. 409-413.
Gerzelka, "The Input Circuit of a KW Receiver for 2 . . . 30 MHz", Funk-Technik, vol. 31, No. 14, Jul. 1976, pp. 441, 444-446 and partial translation.

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