Dynamic information storage or retrieval – Binary pulse train information signal – Binary signal processing for controlling recording light...
Reexamination Certificate
2007-04-10
2007-04-10
Wellington, Andrea (Department: 2627)
Dynamic information storage or retrieval
Binary pulse train information signal
Binary signal processing for controlling recording light...
C369S059150, C369S059170, C369S124110, C331S011000, C331S014000
Reexamination Certificate
active
09712104
ABSTRACT:
Disclosed is a PLL circuit having a voltage-controlled oscillator, to which a difference voltage across non-inverting and inverting input terminals is input as a control voltage, for oscillating at a frequency in accordance with the control voltage; a phase comparator for comparing the phase of an output signal obtained by frequency-dividing the output of the voltage-controlled oscillator by a frequency-divider, with the phase of an input signal and outputting the result of this phase comparison; first and second loop filters connected at output terminals thereof to the non-inverting and inverting input terminals, respectively, of the voltage-controlled oscillator; and a charge pump, which is responsive to receipt of an UP signal supplied from the phase comparator, for supplying a first charging current from a PMOS transistor to a capacitor of the first loop filter and supplying a first discharge current from an NMOS transistor to a capacitor of the second loop filter, and which is responsive to receipt of a DOWN signal supplied from the phase comparator, for supplying a second charging current from a PMOS transistor to a capacitor of the second loop filter and supplying a second discharge current from an NMOS transistor to a capacitor of the first loop filter.
REFERENCES:
patent: 4918404 (1990-04-01), Vitiello et al.
patent: 5574515 (1996-11-01), Ogasawara
patent: 58-009409 (1983-01-01), None
patent: 59-172180 (1984-09-01), None
patent: 6-152401 (1994-05-01), None
patent: 11-186904 (1999-07-01), None
patent: 11-298261 (1999-10-01), None
patent: 2000-22526 (2000-01-01), None
patent: 2001-135038 (2000-05-01), None
patent: 2000-224027 (2000-08-01), None
patent: 2000-332602 (2000-11-01), None
Chu Kim-Kwok
Hayes & Soloway P.C.
Wellington Andrea
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