Playback clock generating circuit

Details Playback clock generating circuit Playback clock generating circuit

1997-01-24

1998-02-03

Edun, Muhammad N.

Dynamic information storage or retrieval

Condition indicating, monitoring, or testing

Including radiation storage or retrieval

369 59, 369 50, 369 47, G11B 700

Patent

active

057152225

ABSTRACT:
A playback clock generating circuit whereby the effect of a local flaw may be diminished to enable high-precision clock reproduction. During reproduction of a reference area, a signal processor 2 calculates a phase error of the playback clocks CK by a clock generation processor 2A based on sampled values of the playback signals of the reference pattern A/D converted by an A/D converter 1. During reproduction of a data area, the signal processor sends a phase correction signal derived form the phase error to a clock generator 3 for correcting the phase of the playback clock CK generated by the clock generator 3.

REFERENCES:
patent: 5278814 (1994-01-01), Deguchi et al.
patent: 5619484 (1997-04-01), Yokota et al.
patent: 5636196 (1997-06-01), Kumagai

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