Chemistry: electrical and wave energy – Apparatus – Electrolytic
Reexamination Certificate
2000-12-22
2003-10-14
Ryan, Patrick (Department: 1745)
Chemistry: electrical and wave energy
Apparatus
Electrolytic
C204S22400M
Reexamination Certificate
active
06632335
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a plating apparatus and a plating method for a substrate, and more particularly to a plating apparatus and a plating method for a substrate for filling a metal such as copper (Cu) or the like in fine interconnection patterns (recesses) formed on a semiconductor substrate.
The present invention also relates to an electrolytic treatment method for applying electrolytic treatment, such as plating or etching, to the surface of a substrate to be treated, and an apparatus therefor.
The present invention further relates to an electrolytic treatment apparatus for applying, for example, plating or etching to the surface of a member to be treated, especially an electrolytic treatment apparatus and a method for controlling the state of its electric field.
2. Description of the Related Art
Aluminum or aluminum alloy has generally been used as a material for forming interconnection circuits on semiconductor substrates. As the integrated density increases, there is a demand for the usage of a material having a higher conductivity as an interconnection material. A method has been proposed to plate a substrate to fill an interconnection pattern formed thereon with copper or its alloy.
There are various processes known including CVD (chemical vapor deposition), sputtering, etc. to fill the interconnection pattern with copper or its alloy. However, if the material of the metal layers is copper or its alloy, i.e., for forming copper interconnects, the CVD process is costly, and the sputtering process fails to embed copper or its alloy in interconnection patterns having a high aspect ratio, i.e., a high ratio of depth to width. The plating process is most effective to deposit a metal layer of copper or its alloy.
Various processes are available for plating semiconductor substrates with copper. They include a process of immersing a substrate in a plating liquid held at all times in a plating tank, referred to as a cup-type or dipping-type process, a process of holding a plating liquid in a plating tank only when a substrate to be plated is supplied to the plating tank, an electrolytic plating process of plating a substrate with a potential difference, and an electroless plating process for plating a substrate with no potential difference.
Conventionally, a plating apparatus for performing this type of copper plating was equipped with a horizontal arrangement of a plurality of units, such as a unit for performing a pretreatment step incidental to plating, a unit for performing a cleaning/drying step after plating, and a unit for performing a plating step, and a transfer robot for transferring the substrate between these units. The substrate was subjected to a predetermined treatment in each unit while being transferred between the units, and was sequentially transported to a subsequent step after plating treatment.
In the conventional plating apparatus, however, separate units were provided for respective steps, such as plating treatment and pretreatment, and the substrate was transferred to the respective units and treated thereby. Thus, there were problems that the apparatus was considerably complicated and difficult to control, occupied a great area, and involved a considerably high manufacturing cost.
With electroplating, moreover, if air bubbles are present in a plating liquid filled between a surface to be plated of a substrate (cathode) and an anode, the air bubbles, as insulators, function as if they were anode masks. As a result, the film thickness of a plating formed at positions corresponding to these portions may decrease, or a complete lack of plating may occur. To obtain a uniform, high quality plated film, therefore, it is necessary to leave no air bubbles in the plating liquid between the surface to be plated of the substrate and the anode.
Furthermore, electrolytic treatment, especially electroplating, is widely used as a method for forming a metal film. In recent years, copper electroplating for multilayer interconnects of copper, and gold electroplating for bump formation, for example, have attracted attention because of their effectiveness (inexpensiveness, hole filling characteristics, etc.), and have found increased use, for instance, in the semiconductor industry.
FIG. 71
shows a conventional general constitution of a plating apparatus for applying electroplating onto the surface of a substrate to be treated (hereinafter referred to as a substrate), such as a semiconductor wafer, by the use of a so-called face-down method. This plating apparatus includes a cylindrical plating tank
602
opening upward and holding a plating liquid
600
therein and a substrate holder
604
for detachably holding a substrate W face-down and at such a position that the substrate W covers the top opening of the plating tank
602
. Inside the plating tank
602
, a flat sheet type anode plate
606
, immersed in the plating liquid
600
to constitute an anodic electrode, is placed horizontally. On the other hand, a conductive layer S is formed on the lower surface (plating surface) of the substrate W, and this conductive layer S has, at its peripheral edge portion, contact with cathodic electrodes.
A plating liquid jet pipe
608
for forming an upwardly directed jet of the plating liquid is connected to the center of the bottom of the plating tank
602
, and a plating liquid receiver
610
is placed on an upper external portion of the plating tank
602
.
With the above structure, the substrate W held by the substrate holder
604
is placed face-down above the plating tank
602
. The plating liquid
600
is gushed upward from the bottom of the plating tank
602
to strike a jet of the plating liquid
600
on the lower surface (plating surface) of the substrate W. Simultaneously, a predetermined voltage is applied between the anode plate
606
(anodic electrode) and the conductive layer S (cathodic electrode) of the substrate W from a plating power source
612
to form a plated film on the lower surface of the substrate W. At this time, the plating liquid
600
which has overflowed the plating tank
602
is collected from the plating liquid receiver
610
.
Wafers and liquid crystal substrates for LSI's tend to increase in area year by year. In line with this tendency, variations in the film thickness of a plated film formed on the surface of the substrate are posing problems. In detail, to supply a cathode potential to the substrate, contacts with the electrode are provided in a peripheral edge portion of the conductive layer formed beforehand on the substrate. As the area of the substrate increases, the electric resistance of the conductive layer ranging from the contact on the periphery of the substrate to the center of the substrate also increases. As a result, a potential difference is produced in the surface of the substrate, causing a difference in the plating speed, thereby leading to variations in the film thickness of the resulting plated film.
That is, to apply electroplating onto the surface of the substrate to be treated, a common practice is to form a conductive layer on the surface of the substrate to be treated (hereinafter referred to simply as “substrate”), bring contacts for supplying a cathode potential into contact with a site on the conductive layer in proximity to the outer periphery of the substrate W, install an anode at a position facing the substrate W, fill a plating liquid between the anode and the substrate W, and apply an electric current between the anode and the contacts with a direct current power source to perform plating on the conductive layer of the substrate W. In the case of a large-area substrate, however, the electric resistance of the conductive layer ranging from the contact close to the outer periphery of the substrate to the center of the substrate W becomes so high that a potential difference arises in the surface of the substrate W, causing differences in the plating speed among respective portions.
FIG. 72
is a view showing the film thickness distribution of co
Hayasaka Nobuo
Inoue Hiroaki
Kaneko Hisashi
Kimura Norio
Kunisawa Junji
Ebara Corporation
Parsons Thomas H.
Ryan Patrick
Wenderoth , Lind & Ponack, L.L.P.
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