Patent
1990-05-18
1991-10-15
Larkins, William D.
357 81, 357 75, H01L 2336, H01L 2350
Patent
active
050579061
ABSTRACT:
A first high-power element chip having high current consumption is mounted and fixed of a first bed portion on a heat radiating fin by soldering. A second high-power element chip is mounted and fixed by high-temperature die bonding on a second bed portion formed by denting a part of one end of a lead frame made of a metal thin plate, and an insulating paste is filled between the lower surface of the second bed portion and the upper surface of the first bed portion. In addition, a logic element chip is mounted and fixed on one end of another lead frame made of a metal thin plate by a conductive adhesive such as a silver paste.
REFERENCES:
patent: 3639770 (1972-02-01), Zizelmann
patent: 3820153 (1974-06-01), Quinn
patent: 4032964 (1977-06-01), Boeters
patent: 4518982 (1985-05-01), DuBois et al.
"Hybrid Integrated Circuit", Takenori Yamashita, Patent Abstract, No. 60-160154, vol. 9, No. 328, published Dec. 24, 1985.
Davenport Teresa
Kabushiki Kaisha Toshiba
Larkins William D.
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