Plastic integrated circuit device package having exposed...

Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type

Reexamination Certificate

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Details

C174S050510, C264S272110, C257S781000, C257S787000

Reexamination Certificate

active

06586677

ABSTRACT:

FIELD OF THE INVENTION
The present invention concerns a method of forming plastic packages for integrated circuit devices.
BACKGROUND OF THE INVENTION
A problem with conventional plastic packages is that their internal leadframes limit reduction of the size of the packages. Practitioners have attempted to reduce the size of packages by eliminating internal leadframes, as is shown in U.S. Pat. No. 4,530,142 to Roche et al.
Roche et al. begins with a metal temporary substrate. A layer of a low melting-point alloy is applied onto to the metal temporary substrate. Next a plurality of metal die pads and leads are formed on the low-melting point alloy layer. An integrated circuit device is placed on each of the die pads and connected to the leads surrounding the respective die pad. The integrated circuit devices are then encapsulated in a single block of encapsulant material. Individual packages are then cut from the block of hardened encapsulant.
The methods and package of Roche et al. have foreseeable disadvantages. For example, the use of the metal temporary substrate and low-melting point alloy layer increase costs and manufacturing difficulty. Further, the packages are believed to be unreliable because the contacts could easily be pulled from the encapsulant material.
A package marketed by Toshiba Corporation of Japan under the name “BCC” is believed to be made as follows. A copper sheet is partially etched through in certain locations, forming pockets isolated by unetched copper. A central pocket is surrounded by several smaller satellite pockets. The copper sheet is then masked, leaving the pockets exposed. Next, the pockets are plated with layers of gold, nickel, and gold. An integrated circuit device is placed in the central pocket. (In some embodiments, there is no central pocket, so the device is simply placed on the copper sheet.) Bond wires are connected between the device and the satellite pockets. Next, the device and bond wires are encapsulated. Finally, the remainder of the copper sheet is etched away by acid, forming a completed package. Once the copper is removed, the metal plated into the satellite pockets forms the leads of the package, and the metal plated into the central depression (if any) is the die pad.
This process is believed to have several disadvantages. First, the use of acid to dissolve the remainder of the copper plate after encapsulation creates a significant possibility of contamination, since such acids are generally regarded as dirty. Second, the package is subject to failure, because the leads are attached to the package only by the bond wire and by the adhesiveness of the encapsulant to the inner surface of the plated pocket. Thus, the leads could easily be detached from the bond wire and package body. Third, epoxy encapsulant material sometimes does not adhere well to gold.
Accordingly, there is a need for a small and reliable package that is easier and less expensive to manufacture than prior art packages.
SUMMARY OF THE INVENTION
The present invention includes a method of manufacturing a package for housing an integrated circuit device. In one exemplary embodiment, Step
1
provides a plastic sheet having an adhesive first surface. The plastic sheet may be plastic tape. Step
2
attaches a metal sheet onto the first surface of the plastic sheet, and then forms an array of package sites by selectively removing portions of the metal sheet. Each package site includes a die pad and a plurality of satellite leads around the die pad. Step
3
attaches an integrated circuit device to each of the die pads. Step
4
connects a conductor, such a bond wire, between each of a plurality of conductive pads on the integrated circuit device and one of the leads of the respective package site. Step
5
applies an encapsulating material onto the first surface of the plastic sheet, integrated circuit devices, the leads, and the electrical conductors of each package site. Step
6
hardens the encapsulating material. Step
7
removes the plastic sheet. Optional Step
8
applies solder balls to the exposed surfaces of the leads of the package sites. Finally, Step
9
separates individual packages from the encapsulated array. An alternative embodiment in an LCC style package requires no solder balls.
An embodiment encompassed within the present invention includes forming a reentrant portion (or reentrant portions) and aspirates on the side surfaces of the die pads and leads of the package sites. During the encapsulation step, the encapsulant material flows into the reentrant portions and aspirates. The reentrant portions and aspirates engage the encapsulant material and lock the die pad and leads to the encapsulant material of the package.
The present invention overcomes the disadvantages of the prior art by, among other things, the use of an inexpensive plastic sheet as a base for forming the packages, and by the formation of encapsulant locking features on the side surfaces of the die pad and leads. These and other advantages will become clear through the following detailed description.


REFERENCES:
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patent: 0 546 285 (1993-06-01), None
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patent: 9-92775 (1997-04-01), None

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