Plastic and grid array semiconductor device and method for makin

Details Plastic and grid array semiconductor device and method for makin Plastic and grid array semiconductor device and method for makin

1993-03-01

1994-04-12

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

257676, 257787, 257697, 257696, H01L 2348, H01L 2946, H01L 2962, H01L 2964

Patent

active

053028490

ABSTRACT:
A plastic land grid array semiconductor device (30) can be manufactured using conventional techniques. In one embodiment, a semiconductor die (12) having an active surface is provided. An LOC leadframe (14) is provided, wherein leads (16) have a horizontal portion (18) and a vertical portion (20). The active surface of the die is attached to the leads with an LOC tape (17) and is electrically connected to the horizontal portion by wire bonds (24). A plastic package body (32) is molded around the die, the wire bonds, and a portion of the leadframe. The vertical portion of the leads terminates and its thickness is exposed at a surface of the package body, thus forming a grid array of external electrical contacts. An insulative material (34) is coated on the sides of the package body to cover any exposed thickness of the horizontal portion of the leads.

REFERENCES:
patent: 3566208 (1971-02-01), Wang
patent: 5089876 (1992-02-01), Ishioka
patent: 5139969 (1992-08-01), Mori
patent: 5164815 (1992-11-01), Lim

Affiliated with

Also associated with

Rating

Plastic and grid array semiconductor device and method for makin does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Plastic and grid array semiconductor device and method for makin, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Plastic and grid array semiconductor device and method for makin will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2100711