Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2007-02-13
2007-02-13
Geyer, Scott B. (Department: 2812)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C257SE21001
Reexamination Certificate
active
10936272
ABSTRACT:
A method for plasma treating an etched opening formed in a porous low-K material to improve barrier layer integrity including providing a substrate comprising an etched opening formed in an insulating dielectric layer including porous low-K silicon oxide according to an overlying patterned resist layer; plasma treating according to a plasma process the etched opening to remove the resist layer and increase a surface density of the insulating dielectric layer within the etched opening; and, blanket depositing a barrier layer over the etched opening.
REFERENCES:
patent: 6537896 (2003-03-01), Catabay et al.
patent: 6673721 (2004-01-01), Kim et al.
patent: 6933246 (2005-08-01), Buchanan et al.
patent: 2001/0045651 (2001-11-01), Saito et al.
Jang Simon
Lin Simon
Yu Douglas
Taiwan Semiconductor Manufacturing Co. Ltd.
Tung & Associates
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