Electric heating – Metal heating – By arc
Reexamination Certificate
2000-09-12
2002-07-30
Walberg, Teresa (Department: 3742)
Electric heating
Metal heating
By arc
C219S121430
Reexamination Certificate
active
06426477
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to the art of plasma processing and more particularly to a plasma processing method and apparatus for eliminating damage in the plasma processing of a substrate.
The art of plasma processing, including plasma-etching process and plasma CVD, is used extensively in the fabrication of various semiconductor devices. Further, plasma processing is also used to produce flat panel display devices such as a liquid crystal display device or a plasma display device.
FIG. 1
shows the construction of a typical conventional plasma-etching apparatus
100
used for etching an insulating film.
Referring to
FIG. 1
, the parallel-plate plasma-etching apparatus
100
includes a processing chamber
101
in which a lower electrode
102
and an upper electrode
103
are accommodated in parallel relationship. The lower electrode
102
functions as a susceptor and supports thereon a substrate W, while the upper electrode
103
is provided so as to face the lower electrode
102
.
The processing chamber
101
is supplied with an etching gas such as a mixture of C
4
F
8
, Ar and O
2
and plasma is formed in the processing chamber
101
by supplying high-frequency power of 60 Mhz from a high-frequency source
104
to the upper electrode
103
via an impedance-matching device
105
. When a plasma-etching process is carried out on an insulation film formed on the substrate W, a low-frequency bias of 2 MHz is supplied further to the lower electrode
102
from a low-frequency power source
108
via an impedance-matching device
109
.
When an a.c. power of low frequency is used for the low-frequency bias, the firing voltage of discharge, above which voltage an electric discharge starts in the processing chamber
101
, increases substantially, provided that the pressure inside the processing chamber
101
is held low. Thus, no firing of plasma occurs.
In the case of applying a plasma-etching process to an insulation film formed on the substrate W by using the parallel-plate plasma-etching apparatus
100
, it has been practiced to activate the high-frequency power source
104
to start a plasma in the processing chamber
101
, and the activation of the low-frequency power source
108
is started thereafter to supply the low-frequency bias to the lower electrode
102
. By doing so, it is possible to avoid the problem of sudden impedance change caused in the lower electrode
102
with the firing of the plasma and the associated problem of sudden change of load of the low-frequency power source
108
.
Meanwhile, Applicants have discovered, when the conventional parallel-plate plasma etching apparatus such as the apparatus
100
of
FIG. 1
is used in the processing of a substrate of advanced, leading-edge semiconductor devices, such as submicron or sub-quarter-micron devices, that the ultrafine semiconductor structures formed on the substrate tend to be damaged as a result of the plasma processing and that a production yield of the semiconductor device is deteriorated.
FIGS. 2A and 2B
show the construction of the test piece used in the foregoing experiment conducted by the Applicants.
Referring to
FIG. 2A
, a Si wafer corresponding to the substrate W of
FIG. 1
carries thereon a number of test elements EL, and each of the test elements EL is constructed on a Si substrate
41
corresponding to the Si wafer W as represented in FIG.
2
B.
Referring to
FIG. 2B
, the Si substrate
41
carries thereon a field oxide film
42
defining an active region, while the-active region thus defined is covered with a thermal oxide film
43
having a thickness of typically about 5 nm. Further, an electrode pattern
44
of polysilicon is formed on the thermal oxide film
43
.
In the experiments, the test elements EL are formed to have an antenna ratio, which is defined as the ratio of the area of the electrode pattern
44
to the area of the thermal oxide film
43
, of 260,000, and a plasma-etching process is conducted while setting the separation between the lower electrode
102
and the upper electrode
103
to 19 mm.
According to the experiment, it was discovered that the proportion of the defective test elements EL on the wafer W reaches as much as 35% and that the breakdown voltage of the thermal oxide film
43
is degraded substantially in such defective test elements. Further, it was recognized that the proportion of such defective devices increases when the plasma etching apparatus of
FIG. 1
is used for processing ultrafine semiconductor devices.
FIG. 3
shows the proportion of the defective test elements observed in the case the substrate of
FIGS. 2A and 2B
is subjected to a plasma etching process in the plasma etching apparatus of
FIG. 1
, wherein the designation “CW” in
FIG. 1
indicates a continuous wave, while the designation “58 k,” “130 k” and “260 k” represent the antenna ratio.
Referring to
FIG. 3
, it can be seen that the proportion of the defective elements changes depending on the size of the gap, or gap distance, between the lower electrode
102
and the upper electrode
103
. Further, the proportion of the defective elements changes on the antenna ratio. As long as the gap distance is set to a value used commonly in the plasma etching process, occurrence of substantial defects cannot be avoided. The relationship of
FIG. 3
also indicates that the proportion of defects increases with increasing antenna ratio when the gap distance between the electrodes
102
and
103
is held constant.
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide a novel and useful plasma processing method and apparatus wherein the foregoing problems are eliminated.
Another and more specific object of the present invention is to provide a plasma processing method and apparatus capable of minimizing the proportion of defective devices formed at the time of the plasma processing.
Another object of the present invention is to provide a plasma processing method conducted in a plasma processing apparatus having a processing chamber, an electrode provided in said processing chamber for supporting a substrate thereon, and a plasma generator provided in said processing chamber, said method comprising the steps of:
(A) supplying a first electric power of a first frequency to said electrode such that said first electric power does not start a plasma in said processing chamber; and
(B) supplying a second electric power of a second frequency to said plasma generator such that said second electric power causes said plasma generator to start a plasma in said processing chamber,
wherein said step (A) is conducted such that said first electric power is supplied to said electrode prior to said start of said plasma in said step (B) by said plasma generator.
Another object of the present invention is to provide a plasma processing method conducted in a plasma processing apparatus having a processing chamber, an electrode provided in said processing chamber for supporting a substrate thereon, and a plasma generator provided in said processing chamber, said method comprising the steps of:
(A) supplying an a.c. power to said electrode such that said a.c. power does not start a plasma in said processing chamber; and
(B) supplying a microwave power to said plasma generator such that said microwave power causes said plasma generator to start a plasma in said processing chamber,
wherein said step (A) is conducted such that said a.c. power is supplied to said electrode prior to start said plasma in said step (B) by said plasma generator.
Another object of the present invention is to provide a plasma processing method conducted in a plasma processing apparatus having a processing chamber and an electrode provided in said processing chamber for supporting a substrate thereon, said method comprising the steps of:
(A) supplying a first electric power of a first frequency to said electrode such that said first electric power does not start a plasma in said processing chamber; and
(B) supplying a second electric power of a second frequency to said
Koshiishi Akira
Koshimizu Chishio
Ooyabu Jun
Takeuchi Hideki
Tokyo Electron Limited
Van Quang
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