Plasma panel display device

Details Plasma panel display device Plasma panel display device

2000-07-18

2003-04-01

Hjerpe, Richard (Department: 2674)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S060000, C345S061000, C345S690000, C345S691000, C345S692000, C315S160000, C315S169100, C315S169200, C315S169300

Reexamination Certificate

active

06542135

ABSTRACT:

TECHNICAL FIELD
The present invention relates to display devices, and in particular, to a display device of a plasma display panel (PDP) and a digital micro mirror device (DMD).
BACKGROUND ART
For the display devices of PDP and DMD, there is used a sub-field method employing a binary memory for displaying a motion picture having a halftone by temporally superimposing a plurality of weighted binary images. Although the description below is provided for PDP, the same thing can be said for DMD.
The sub-field method will be described with reference to
FIGS. 1
,
2
and
3
.
As shown in
FIG. 3
, a PDP having ten pixels arranged laterally by four pixels arranged longitudinally is now considered. The brightness levels of R, G and B of each pixel are each represented in eight bits, allowing the representation of brightness to be achieved with a 256-step gradation. The following description is provided for a G signal unless special comment is given, and the same thing can be said for R and B.
In
FIG. 3
, a portion indicated by the reference letter A has a brightness signal level of 128. If this is represented in binary digits, then a level signal of (1000 0000) is applied to each pixel in the portion A. Likewise, a portion indicated by the reference letter B has the brightness of 127, and a signal level of (0111 1111) is applied to each pixel in the portion B. A portion indicated by the reference letter C has the brightness of 126, and a signal level of (0111 1110) is applied to each pixel in the portion C. A portion indicated by the reference letter D has the brightness of 125, and a signal level of (0111 1101) is applied to each pixel in the portion D. A portion indicated by the reference letter E has the brightness of 0, and a signal level of (0000 0000) is applied to each pixel in the portion E. Each sub-field is obtained by arranging the 8-bit signals of the pixels in the vertical direction in the respective positions of the pixels and slicing the signal every bit in the horizontal direction. That is, according to an image displaying method using the so-called sub-field method for dividing one field into a plurality of differently weighted binary images and displaying the resulting image by temporally superimposing these binary images, each binary image obtained through the division is referred to as a sub-field.
The signal of each pixel is expressed as eight bits, and therefore, eight sub-fields can be obtained as shown in
FIG. 2. A
sub-field SF
1
is obtained by collecting the least significant bits of the 8-bit signals of the pixels and arranging them in a 10×4 matrix form. A sub-field SF
2
is obtained by collecting the second least significant bits and similarly arranging them in a matrix form. According to the above manner, sub-fields SF
1
, SF
2
, SF
3
, SF
4
, SF
5
, SF
6
, SF
7
and SF
8
are formed. Needless to say, the sub-field SF
8
is obtained by collecting the most significant bits and similarly arranging them.
FIG. 4
shows the standard form of a PDP drive signal of one field. As shown in
FIG. 4
, the standard form of the PDP drive signal has the eight sub-fields SF
1
, SF
2
, SF
3
, SF
4
, SF
5
, SF
6
, SF
7
and SF
8
. The sub-fields SF
1
through SF
8
are sequentially processed, and the total processing is executed in a period of one field.
The processing of each sub-field will be described with reference to FIG.
4
. The processing of each sub-field is comprised of a setup period P
1
, a addressing period P
2
, a sustaining period P
3
and an erasing period P
4
. In the setup period P
1
, a single pulse is applied to a sustaining electrode E
0
, while a single pulse is each applied also to scanning electrodes E
1
, E
2
, E
3
and E
4
(the reason why only four scanning electrodes are shown in
FIG. 4
is that only four scanning lines are shown in the example of
FIG. 3 and a
number of, for example, 480 scanning lines actually exist). By this operation, set up discharging is executed.
In the addressing period P
2
, the scanning electrodes in the horizontal direction are successively scanned, and only the pixel in which a data pulse is applied to a data electrode E
5
at the timing when a wrinting palse is applied to the scanning electrode is subjected to specified writing. For example, during the processing of the sub-field SF
1
, the pixel indicated by “1” is subjected to writing and the pixel indicated by “0” is not subjected to writing inside the sub-field SF
1
shown in FIG.
2
.
In the sustaining period P
3
, one or more sustaining pulse (drive pulse) corresponding to the weight value of each sub-field is outputted. The pixel that has undergone writing and is indicated by “1” is subjected to plasma discharging in response to each sustaining pulse, and the specified pixel brightness is obtained through one process of plasma discharging. The weight of the sub-field SF
1
is “1”, and therefore, the brightness of level “1” can be obtained. The weight of the sub-field SF
2
is “2”, and therefore, the brightness of level “2” can be obtained. That is, the addressing period P
2
is a period during which the pixel for emitting light is selected, while the sustaining period P
3
is a period during which light emission is executed by the number of times corresponding to the quantity of weighting.
In the erasing period P
4
, the remaining electric charges are entirely erased.
As shown in
FIG. 4
, the sub-fields SF
1
, SF
2
, SF
3
, SF
4
, SF
5
, SF
6
, SF
7
and SF
8
are weighted by 1, 2, 4, 8, 16, 32, 64 and 128, respectively. Therefore, with regard to each pixel, the brightness level can be adjusted in 256 steps ranging from 0 to 255.
In the portion B of
FIG. 3
, light emission is executed in the sub-fields SF
1
, SF
2
, SF
3
, SF
4
, SF
5
, SF
6
and SF
7
, and no light emission is executed in the sub-field SF
8
. Accordingly, there can be obtained the brightness level of “127” (=1+2+4+8+16+32+64).
In the portion A of
FIG. 3
, light emission is executed in neither one of the sub-fields SF
1
, SF
2
, SF
3
, SF
4
, SF
5
, SF
6
and SF
7
, and light emission is executed in the sub-field SF
8
. Accordingly, there can be obtained the brightness level of “128”.
With regard to the standard form of the PDP drive signal shown in
FIG. 4
, the PDP drive signal has a variety of modifications, and these modifications will be described below.
FIG. 5
shows a PDP drive signal in a twofold mode. It is to be noted that the PDP drive signal shown in
FIG. 4
is in a onefold mode. In the onefold mode of
FIG. 4
, the number of sustaining pulses included in the sustaining periods P
3
of the sub-fields SF
1
through SF
8
, i.e., the weighting values is 1, 2, 4, 8, 16, 32, 64 and 128, respectively. By contrast, in the twofold mode of
FIG. 5
, the number of sustaining pulses included in the sustaining periods P
3
of the sub-fields SF
1
through SF
8
becomes 2, 4, 8, 16, 32, 64, 128 and 256, respectively, which are doubled in every sub-field. With this arrangement, the PDP drive signal in the twofold mode can display the image with the doubled brightness in contrast to the PDP drive signal of the standard form in the onefold mode.
FIG. 6
shows a PDP drive signal in a threefold mode. Therefore, the number of sustaining pulses included in the sustaining periods P
3
of the sub-fields SF
1
through SF
8
becomes 3, 6, 12, 24, 48, 96, 192 and 384, which are tripled in every sub-field.
As described above, there can be formed a PDP drive signal in a sixfold mode at maximum, also depending on a margin in one field. With this arrangement, the image can be displayed with the sixfold brightness.
It is herein defined that the modal multiple is generally represented as N-fold. This N can also be represented as a weighting multiple N.
FIG. 7A
shows the PDP drive signal in the standard form, while
FIG. 7B
shows a modified PDP drive signal having sub-fields SF
1
through SF
9
including the one additional sub-field. Although the last sub-field SF
8
is weighted by 128 sustaining pulses in the standard form, the last two sub-fields SF
8
and

Affiliated with

Also associated with

Rating

Plasma panel display device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Plasma panel display device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Plasma panel display device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3098869