Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2002-02-13
2004-05-18
Goudreau, George A. (Department: 1763)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C216S067000
Reexamination Certificate
active
06737358
ABSTRACT:
TECHNICAL FIELD
This invention relates to plasma etching uniformity control.
BACKGROUND
Plasma etching is used, e.g., in the fabrication of integrated circuits to produce high-resolution patterns in a semiconductor (e.g., silicon) wafer. The wafer is placed in a chamber in which electrons are accelerated by radio frequency (RF) or microwave electric fields. The electrons collide with other molecules to produce ions, neutral radicals, and more electrons. Between the plasma and the wafer surface layer, an electron-free space-charge region, called a “sheath”, is formed, and ions are accelerated toward the wafer surface when entering the sheath. The accelerated ions bombard the wafer surface with high energies and chemically etch areas of the wafer that are exposed to the plasma. The areas exposed are in patterns defined by a resist placed on the wafer surface using lithographic methods.
In a typical plasma etching process, the etch rate near the center of the wafer is often greater than the etch rate in peripheral regions of the wafer, which can lead to uneven etch depths across the wafer. To alleviate this problem, wafers are sometimes provided with a stop layer at the desired etch depth. The stop layer is made of a material that is etched at a lower rate compared to the wafer surface material. As a result, when the central portions etch to the stop layer, etching can be continued until the peripheral regions etch to the stop layer.
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Abe Tsukasa
He Y. Long
Kwok Albert
Wu Han-Ming
Goudreau George A.
Intel Corporation
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