Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
1999-10-29
2002-06-04
Mills, Gregory (Department: 1763)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S052000
Reexamination Certificate
active
06399516
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to processes for etching silicon substrates, and more particularly relates to etch techniques for producing mechanical structures, or elements, on or out of a silicon substrate.
The broad class of etch techniques known collectively as micromachining are now commonly employed to etch silicon substrates and related electronic materials to produce mechanical and electromechanical elements and systems. In addition to its well-known electrical properties, silicon has been found to exhibit superior mechanical properties. As a result, silicon is routinely employed for both electrical functionality and structural support in micromachined sensor and actuator systems.
Historically, two classes of micromachining etch techniques have been applied to silicon. In a first class, known as surface micromachining, layers of material, e.g., silicon dioxide and polycrystalline silicon (polysilicon), are applied to the surface of a silicon substrate and etched to form suspended mechanical and/or electrical elements that are attached to the substrate, or to form free elements that are removed from the substrate or held captured by other structures. The second etch technique class, known as bulk micromachining, employs processes for etching a single crystal silicon substrate itself to produce mechanical and/or electromechanical elements out of the substrate. This enables the production of suspended or free elements that are integral to the substrate.
For many applications, it is preferred that a mechanical or electromechanical element be formed of single crystal silicon rather than polysilicon. Single crystal silicon is mechanically more robust than polysilicon, and single crystal silicon exhibits superior electrical properties over that of polysilicon. As a result, an electromechanical element that is formed of single crystal silicon is in general expected to provide a range of performance advantages over a corresponding polysilicon electromechanical element.
Of particular interest is the ability to produce single crystal silicon elements that are free to move vertically and/or horizontally and that are mechanically attached to and accessible at the surface of a silicon substrate in the manner of surface-micromachined elements. This enables an electromechanical sensor and actuator configuration with processing and input/output electronics integrated locally on the same substrate. Such a configuration captures the advantages of surface micromachining, in its unobstructed access to surface elements, and of bulk micromachining, in its formation of single crystal silicon elements.
There have been proposed a wide range of processes for bulk micromachining a silicon substrate, including both wet and dry etch processes. A requirement of integration of electronics on the same substrate from which an element is to be etched places severe restrictions on the applicability of many etch processes, however; the electronics' materials must be securely masked from or be completely impervious to the substrate etch environment. Conventional wet etch techniques are typically found to not enable this integration requirement because it is generally not possible to adequately mask substrate electronics from wet etch conditions without degrading the electronics' material integrity.
Plasma and other dry etch processes have been proposed for overcoming the inherent limitations of wet etch conditions in bulk micromachining a silicon substrate on which electronics are integrated. Dry etch processes generally have been found to require either exotic and complicated masking and etch parameters or to not enable the degree of dimensional control that is required for many sensor and actuator applications. As a result, electromechanical, micromachined silicon elements, and particularly single crystal silicon elements, cannot be routinely fabricated with integrated electronics for addressing many sensor and actuator applications.
SUMMARY OF THE INVENTION
The invention enables the production of silicon structures using bulk micromachining plasma etch techniques. The invention specifically provides plasma etch processes that can be employed to etch both vertical trenches that define the lateral geometry of a silicon element as well as horizontal release areas under the silicon element to thereby form a suspended and mechanically moveable structure that can be employed as, e.g., an electromechanical actuator or sensor.
In the etch method of the invention, first a substrate configuration is provided that includes a silicon layer having a first face and a thickness corresponding to a specified thickness of the silicon element that is to be formed. The configuration further includes a layer of an electrically-insulating material located below and adjacent to the silicon layer. A substantially vertical trench is etched from the first face in the silicon layer to a depth that exposes the insulating layer. Then the trench in the silicon layer is exposed to a gaseous environment that is reactive with silicon, to substantially lateral etch the silicon layer preferentially at the depth of the insulating layer along a surface of the insulating layer. This lateral etch is continued for a duration that results in release of a silicon element over the insulating layer.
In accordance with the invention, this release of a silicon element can be complete, in that the element is fully separate and free from the silicon layer and thus can be completely removed from the silicon layer; or can be partial, in that the element is suspended over the insulating layer and can move in at least one direction, but is anchored to the silicon layer at at least one point. For example, the process of the invention enables the fabrication of a silicon doubly-supported or cantilever beam, or a pair of interdigitated fingers, suspended over the insulating layer.
The electrically-insulating material can be provided as, e.g., silicon dioxide that is grown, a deposited layer of silicon nitride, a spin-applied polymer, or other suitable material. The substrate configuration can be provided by, e.g., forming the electrically-insulating layer on a first silicon substrate; bonding a second silicon substrate to the formed insulating layer; and then thinning the second silicon substrate to the specified silicon element thickness. Alternatively, there can be formed a polysilicon layer of the specified silicon element thickness on the insulating layer.
In preferred embodiments, the reactive gaseous environment is a plasma environment characterized as being an anisotropic silicon etchant. In one example, the reactive gaseous environment is provided as alternating time intervals of a first environment comprising SF
6
and a second environment comprising C
4
F
8
.
In accordance with the invention, it is contemplated that the lateral edges of the silicon element be photolithographically defined; these edges to be formed by the vertical trench etch in the silicon layer. In one example the photolithographic definition of the silicon element's lateral edges is a photolithographic definition of a lateral anchor from the silicon element to the silicon layer. Here the step of reactive gaseous environment exposure of the silicon layer is carried out until the silicon element is vertically suspended over the insulating layer but laterally anchored to the silicon layer. In a further example, photolithographic definition of the silicon element's lateral edges is a photolithographic definition of a trench that completely circumscribes the silicon element. In this case the step of reactive gaseous environment exposure of the silicon layer is carried out until the silicon element is completely released from the silicon layer.
One particular advantage of the etch process of the invention is the ability to integrate microfabricated electronics on the substrate configuration. In one example process, electronics are fabricated on the silicon layer, and then electronics are coated with a removable protective coating, prior to the
Lober Theresa A.
Massachusetts Institute of Technology
Mills Gregory
Zervigon Rudy
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