Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device
Reexamination Certificate
2001-09-24
2004-05-25
Vo, Tuyet T. (Department: 2821)
Electric lamp and discharge devices: systems
Plural power supplies
Plural cathode and/or anode load device
C315S169400, C345S076000, C345S077000, C345S060000, C313S610000, C313S609000
Reexamination Certificate
active
06741038
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application claims the benefit of Korean Application No. 00-57866, filed Oct. 2, 2000, in the Korean Industrial Property Office, the disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a plasma display panel, and more particularly, to a plasma display panel in which widths of partition walls formed on a substrate are adjusted to be different to secure luminance uniformity.
2. Description of the Related Art
Typically, plasma display panels are image display apparatuses that display desired numbers, characters or graphics by discharging gas injected between two substrates having electrodes to produce ultraviolet rays, and to excite a phosphor layer using the ultraviolet rays produced from the discharge. Plasma display panels can be classified into a direct current (DC) type and an alternating current (AC) type according to a mode of applying a driving voltage to discharge cells (e.g., a discharge mode). Plasma display panels can be further classified into an opposite discharge type and a surface discharge type according to the configuration of the electrodes.
FIG. 1
shows a plasma display panel disclosed in Japanese Patent Publication No. hei 10-241577. Referring to
FIG. 1
, a plasma display panel
10
includes a front substrate
11
and a rear substrate
12
facing the front substrate
11
. Sustain electrodes
13
are formed in a striped pattern on the bottom of the front substrate
11
. The sustain electrode
13
is one of a common and scanning electrode, depending on the placement. Bus electrodes
15
are formed on the sustain electrodes
13
to reduce line resistance of the sustain electrodes
13
. The bus electrodes
15
are formed of a metallic material having excellent conductivity. The electrodes
13
and
15
are covered with a first dielectric layer
16
on the front substrate
11
. A protective layer
17
such as an oxide magnesium (MgO) film is formed on the bottom of the first dielectric layer
16
.
Address electrodes
18
are formed on top of the rear substrate
12
and are orthogonal to the sustain electrodes
13
. The address electrodes
18
may be covered with a second dielectric layer
19
. A plurality of partition walls
100
are formed on top of the second dielectric layer
19
. The inner sides of adjacent pairs of the partition walls
100
are coated with red, green and blue phosphor layers
110
.
When a predetermined voltage is applied to a panel, the voltage waveform of each electrode
13
is sequentially driven starting from the periphery of the panel. The voltage waveform changes in a discharge space at the center of a substrate
11
due to a voltage drop that occurs due to the line resistance of the bus electrode
15
. Accordingly, it is necessary to compensate for the voltage drop at the center of the substrate
11
. Moreover, due to a change in a voltage waveform, the luminance is lower at the center of the substrate
11
than at the periphery thereof, resulting in nonuniformity of luminance.
To overcome these problems, the bus electrodes
15
in the plasma display panel
10
are formed to have different widths. In other words, the width of the bus electrode
15
gradually increases (i.e., thickens) from the periphery of the front substrate
11
toward the center thereof so that the line resistance of the bus electrode
15
per unit length decreases from the periphery of the front substrate
11
toward the center thereof. Alternatively, the bus electrodes
15
may be formed to be thicker at the center of the front substrate
11
, or may be formed of a material having low resistance.
However, the plasma display panel
10
has the following problems. Generally, the discharge voltage and the luminance are essential to the uniformity of a panel. The panel
10
has a uniform discharge voltage since the resistance of the bus electrode
15
per unit length decreases from the periphery of the front substrate
11
toward the center thereof. However, as the width of the bus electrode
15
formed of an opaque metallic material increases, the opening ratio of a corresponding discharge space decreases. In other words, by forming the bus electrodes
15
to have different widths in order to realize the uniform light emission of the panel
10
, a discharge voltage increases from the periphery of the front substrate
11
toward the center so as to improve, which simultaneously decreases the opening ratio to thereby degrade the luminance.
SUMMARY OF THE INVENTION
To solve the above and other problems, it is an object of the present invention to provide a plasma display panel with partition walls having different widths on a substrate so as to enlarge a voltage margin and realize luminance uniformity.
Additional objects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
To achieve the and other objects, a plasma display panel in which partition walls are formed to have different widths according to an embodiment of the present invention includes a front substrate, sustain electrodes formed in a striped pattern on a bottom of the front substrate, a bus electrode formed on a bottom of each sustain electrode, a dielectric layer formed on the bottom of the front substrate to cover the sustain and bus electrodes, a protective layer formed on a bottom of the dielectric layer, a rear substrate disposed opposite the front substrate, address electrodes formed on a top of the rear substrate to be orthogonal to the sustain electrodes, partition walls having different corresponding widths formed on the address electrodes in a direction parallel to the address electrodes to define discharge spaces between corresponding pairs of the partition walls, and red, green and blue phosphor layers deposited between corresponding pairs of the partition walls.
According to an aspect of the present invention, the plasma display panel further includes another dielectric layer formed to cover the address electrodes.
According to another aspect of the present invention, the width of each of the partition walls decreases from a periphery of the rear substrate toward a center in proportion to a voltage drop of the bus electrodes.
According to yet another aspect of the present invention, the discharge spaces gradually become narrower from the center of the rear substrate toward the periphery corresponding to a change in the width of each of the partition walls.
REFERENCES:
patent: 6034657 (2000-03-01), Tokunaga et al.
patent: 6420835 (2002-07-01), Chen et al.
patent: 6424095 (2002-07-01), Hirao et al.
patent: 6498430 (2002-12-01), Sakai et al.
patent: 6501444 (2002-12-01), Yanagida et al.
patent: 6577061 (2003-06-01), Sano et al.
patent: 0939420 (1999-09-01), None
patent: 1033740 (2000-09-01), None
patent: 1058284 (2000-12-01), None
patent: 10-241577 (1998-09-01), None
patent: 11-185631 (1999-07-01), None
patent: 2000-243298 (2000-09-01), None
patent: 1999-30025 (2001-02-01), None
McGuireWoods LLP
Samsung SDI & Co., Ltd.
Vo Tuyet T.
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