Plasma display panel of a surface discharge type and a...

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S060000

Reexamination Certificate

active

06342874

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a plasma display panel (PDP) of a surface discharge type and a method for driving the PDP.
The surface discharge PDP comprises a plurality of sustain electrodes X and Y. A pair of sustain electrodes X and Y are disposed on a substrate at the same surface thereof corresponding to one display line (row).
A conventional surface discharge PDP comprises a plurality of sustain electrodes X and Y alternately formed in pairs. In such a structure, since the sustain electrodes X and Y adjoin each other, a difference of potential is produced in the line, and a parasitic capacity exists in the line, which causes electric power consumption to increase. In order to prevent unnecessary surface discharge in the line and reduce the parasitic capacity in the line, it is necessary to have a large distance between the electrodes in the line. Such a large distance makes it difficult to obtain high definition of the PDP by reducing a line pitch.
FIG. 4
shows a PDP for solving those problems. A pair of sustain electrodes X and Y are alternately disposed, interposing the discharge gap G so as to alternately change the disposition every display line L. For example, a pair of sustain electrodes X
1
and X
2
to which the same drive signal is applied are made into one and commonly disposed between the sustain electrodes Y
1
and Y
2
which are selectively and sequentially driven every display line L. Similarly, a pair of sustain electrodes X
3
and X
4
are made into one and commonly disposed between the sustain electrodes Y
3
and Y
4
.
Each of the sustain electrodes X and Y comprises a transparent electrode
12
formed by a transparent conductive film and a bus electrode
13
formed by a metallic film layered on the transparent electrode
12
for compensating the conductivity of the transparent electrode
12
. The sustain electrodes are covered by a dielectric layer. A plurality of elongated partitions
10
a
are provided in the direction perpendicular to the sustain electrodes.
In a driving operation of the PDP, a unit display period is divided into a reset all at once period, an address period, a discharge sustaining period and a wall charge erasing period as shown in FIG.
5
.
In the reset all at once period, reset pulses RPx are applied to the sustain electrodes X
1
-Xn, and reset pulses RPy are applied to the sustain electrodes Y
1
-Yn. Thus, the sustain electrodes are excited to discharge at all of the discharge cells for initializing.
In the address period, pixel data pulses DP are applied to the address electrodes by a selecting and writing address method or a selecting and erasing address method. At that time, scanning pulses SP are applied to the sustain electrodes Y. Thus, the wall charge is accumulated on the discharge cell to be lighted every line in order.
In the discharge sustaining period, discharge sustaining pulses IPx and IPy of the same phase are alternately applied to the sustain electrodes X
1
-Xn, and Y
1
-Yn for sustaining the discharge and emission of light.
In the wall charge erasing period, wall charge erasing pulses EP are applied to the sustain electrodes.
In such a structure, since a pair of sustain electrodes X are commonly disposed, the number of sustain electrodes X can be reduced half. Thus, the PDP of high definition is obtained. However, the sustain electrodes X are common to the opposite adjoining lines L, and the partitions
10
a
are formed in stripes. Therefore, the discharge expands in upper and lower directions through the sustain electrodes X and transferred to the adjacent discharge cells. Thus, error discharge is liable to occur. Similarly, in the adjacent sustain electrodes Y, if the distance between the electrodes is small, the discharge expands in upper and lower directions, causing error discharge to occur.
In order to prevent the discharge from expanding in upper and lower directions, the partition
10
a
may be formed in a checked pattern to section a discharge space every discharge cell. However, it is very difficult to form a checked partition with high accuracy of good yield.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a plasma display panel of a surface discharge type in which high definition is obtained and quality of display is improved.
According to the present invention, there is provided a plasma display panel of a surface discharge type, including a first substrate at a display side, a second substrate at a backside opposite to the first substrate, interposing a discharge space, a first sustain electrode and a second sustain electrode, interposing a discharge gap at every display line at the display side, a plurality of address electrodes disposed on the second substrate in a direction perpendicular to the first and second sustain electrodes to form a discharge cell at every intersection of the electrodes, each of the first and second sustain electrodes being formed by a transparent conductive film and a metallic film mounted on the transparent conductive film at a position away from the discharge gap, a dielectric layer mounted on the transparent conductive film and the metallic film.
The first sustain electrode and the second sustain electrode are alternately disposed at every display line, the first sustain electrode comprises a pair of elements which are commonly disposed with respect to an adjacent display line, and a surface of the dielectric film corresponding to the metallic film is projected from a surface corresponding to other portions.
A plurality of partitions are provided in each display cell, arranged in an extending direction of the first and second sustain electrodes.
A plurality of projection are provided in each of the display cells opposite to each other, interposing the discharge gap.
Each of the projections has a wide width portion at adjacent the discharge gap, and a small width portion at a base portion thereof.
The present invention further provides a driving method for a plasma display panel of a surface discharge type, the plasma display panel including a first substrate at a display side, a second substrate at a back side opposite to the first substrate, interposing a discharge space, a first sustain electrode and a second sustain electrode, interposing a discharge gap at every display line at the display side, a plurality of address electrodes disposed on the second substrate in a direction perpendicular to the first and second sustain electrodes to form a discharge cell at every intersection of the electrodes, each of the first and second sustain electrodes being formed by a transparent conductive film and a metallic film mounted on the transparent conductive film at a position away from the discharge gap, a dielectric layer mounted on the transparent conductive film and the metallic film.
The method comprises the steps of applying reset pulses to all of the first and second sustain electrodes to discharge all of the discharge cells, thereby forming wall charge in each of the discharge cells, applying pixel data pulses to address electrodes in accordance with display data, lighted pixels and unlighted pixels are selected, alternately applying discharge sustaining pulses to the first and second sustain electrodes for sustaining the lighted pixels and unlighted pixels, each of the reset pulses having a sufficiently longer time constant than the discharge sustaining pulse.
These and other objects and features of the present invention will become more apparent from the following detailed description with reference to the accompanying drawings.


REFERENCES:
patent: 5541479 (1996-07-01), Nagakubo
patent: 5661500 (1997-08-01), Shinoda et al.
patent: 5838105 (1998-11-01), Mitomo
patent: 5952783 (1999-09-01), Kuroki et al.
patent: 5952986 (1999-09-01), Nguyen et al.
patent: 5977708 (1999-11-01), Amatsu et al.
patent: 6018329 (2000-01-01), Kida et al.
patent: 6034657 (2000-03-01), Tokunaga et al.

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