Electric lamp and discharge devices – With gas or vapor – Three or more electrode discharge device
Reexamination Certificate
2002-03-13
2004-06-01
Patel, Nimeshkumar D. (Department: 2879)
Electric lamp and discharge devices
With gas or vapor
Three or more electrode discharge device
C313S583000, C313S586000, C313S495000, C315S169400
Reexamination Certificate
active
06744203
ABSTRACT:
CLAIM OF PRIORITY
This application makes reference to, incorporates the same herein, and claims all benefits accruing under 35 U.S. C. §119 from an application for PLASMA DISPLAY DEVICE earlier filed in the Korean Industrial Property Office on Mar. 13, 2001, and there duly assigned Ser. No. 12892/2001 by that Office.
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to a plasma display panel (PDP) and, more particularly, to a plasma display panel having improved address electrodes.
2. Related Art
A plasma display panel generates light by exciting fluorescent materials or special discharge gases. A predetermined voltage is applied between two electrodes to cause a discharge, and a fluorescent layer is excited by ultraviolet light generated by the discharge, thereby forming a picture image.
A plasma display panel is a thin display device that can display images rapidly and that can allow for a large screen size. Plasma display devices can be divided into direct current (DC) plasma display devices and alternating current (AC) plasma display devices according to their operating principles. Also, depending on the electrode structure, the plasma display device has two or three electrodes for discharge. In the direct current plasma display device, an auxiliary anode is additively installed to induce an auxiliary discharge. In the alternating current plasma display device, an address electrode is introduced to separately provide a selective discharge and a sustaining discharge to enhance addressing speed.
Also, the electrode structure of the alternating current plasma display device can be classified into an opposing electrode structure and a surface-discharge type electrode structure, according to the arrangement of discharge-inducing electrodes. In the former case, two discharge-inducing sustaining electrodes are disposed on a front substrate and a rear substrate, respectively, so that a discharge takes place in a direction perpendicular to the panel. In the latter case, two sustaining electrodes are disposed on a substrate so that a discharge takes place along the substrate.
One problem that can occur in a plasma display panel is the lack of ability to attain sufficient brightness. That problem can occur if there is a large quantity of scanning electrodes. Also, in a plasma display panel, some arrangements of electrode elements and throughholes can make mass production difficult We have found that it would be desirable to have improved address electrodes for a plasma display panel.
Exemplars of recent efforts in the art include U.S. Pat. No. 5,967,872 for METHOD FOR FABRICATION OF A PLASMA DISPLAY PANEL issued to Betsui et al. on Oct. 19, 1999 and Japanese Patent Publication No. hei 10-240188 for PICTURE DISPLAY DEVICE AS PICTURE DISPLAY METHOD issued to Yamazaki et al. on Sep. 11, 1998.
While these recent efforts provide advantages, we note that they fail to adequately and conveniently provide improved address electrodes for a plasma display panel
SUMMARY OF THE INVENTION
To solve the above disadvantages and problems, and other problems, it is an object of the present invention to provide a plasma display panel in which a plurality of sub-fields can be designed within one field to reduce pseudo details by reducing addressing time and increasing sustaining discharge time by dividing an address electrode into a plurality of parts.
It is another object of the present invention to provide a plasma display panel to increase the design margin of a driving method thereof by reducing addressing time. In a plasma display panel, an addressing time for the respective sub-fields within the period of one frame occupies approximately 70% of the entire driving time of one frame, while resetting or sustain discharging takes place for the remaining time period, that is, 30% of the entire driving time. Thus, there are some limits in increasing the number of sub-fields or designing the arrangement of sub-fields in various manners. However, according to the principles of the present invention, since the addressing time is reduced, various arrangements of sub-fields can be designed within the period for one frame and the number of sub-fields can be increased. The phrase “design margin” used in the Specification means the amount of freedom available in designing a plasma display panel. In other words, the design margin is the area within the design limits. Accordingly, a wider design margin means that a plasma display panel is less restricted in terms of design.
Additional objects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
To accomplish the above and other objects, a plasma display panel according to an embodiment of the present invention includes a substrate, partitions spaced a predetermined distance apart from each other on the substrate, address electrodes having a predetermined pattern formed on portions of the substrate between each of the partitions, each address electrode being split into at least three parts with each split part corresponding to at least two pixels, a first dielectric layer formed on the substrate to cover the address electrodes, via holes formed on portions of the substrate corresponding to the respective address electrodes, a conductive layer formed in the via holes electrically connected with the address electrodes, terminals connected to the conductive layer and formed on a rear surface of the substrate, a transparent front plate disposed opposite the substrate, a plurality of sustaining electrodes formed in a direction on the front plate opposite the substrate at a predetermined angle with respect to a direction of the address electrodes and having pairs of first and second electrodes, and a second dielectric layer installed on the front plate to cover the sustaining electrodes.
According to an aspect of the present invention, a plasma display panel further includes a printed circuit board (PCB) having supply terminals contacting the terminals on the rear surface of the substrate, the supply terminals corresponding to the terminals of the address electrodes.
According to another embodiment of the present invention, a plasma display panel includes a substrate, partitions spaced a predetermined distance apart from each other on the substrate, address electrodes having a predetermined pattern formed on portions of the substrate between adjacent pairs of the partitions, each address electrode being split into at least three parts with each split part corresponding to at least two pixels, a first dielectric layer formed on the substrate to cover the address electrodes, an insulation layer formed between the address electrodes and the substrate, a voltage supplying unit positioned on a lower surface of the insulation layer to apply a predetermined voltage to corresponding ones of the address electrodes, a transparent front plate disposed opposite the substrate, a plurality of sustaining electrodes formed on the front plate opposite to the substrate at a predetermined angle with respect to the direction of address electrodes and having pairs of first and second electrodes, and a second dielectric layer installed on the front plate to cover the sustaining electrodes.
According to another aspect of the present invention, the voltage supplying unit includes via holes formed on portions of the dielectric layer corresponding to each of the address electrodes, a conductive layer formed in the via holes and electrically connected with the address electrodes, and an interconnection layer formed between the insulation layer and the substrate in a predetermined pattern to be electrically connected to the conductive layer.
The present invention is more specifically described in the following paragraphs by reference to the drawings attached only by way of example. Other advantages and features will become apparent from the following description and from the claims.
REFERENCES:
patent: 5061876 (1991-10-01), Park
pate
Hong Dae-young
Jeong Jae-Seok
Bushnell , Esq. Robert E.
Colón German
Patel Nimeshkumar D.
Samsung SDI & Co., Ltd.
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