Electric lamp or space discharge component or device manufacturi – Process – With assembly or disassembly
Reexamination Certificate
2002-04-17
2003-02-04
Ramsey, Kenneth J. (Department: 2879)
Electric lamp or space discharge component or device manufacturi
Process
With assembly or disassembly
C313S586000
Reexamination Certificate
active
06514111
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates in general to a plasma display panel, and more particularly to an AC memory type plasma display panel and a method for fabricating the same.
2. Description of the Related Art
An AC memory type plasma display panel (hereinafter abbreviated as “PDP”) is provided so that a dielectric layer for storing an electric charge resulting from a discharge covers a discharge electrode. In this PDP, a damage to the dielectric layer may cause leakage of a discharge gas, and particularly, a damage to the dielectric layer at a sealing section is fatal. A sealing structure and a sealing method not damaging the dielectric layer is therefore demanded.
As a typical example of PDP, a PDP of three-electrode lateral discharge structure is illustrated in FIG.
6
and will briefly be described.
FIG. 6
is a perspective view of a partially cut PDP. In
FIG. 6
, main electrodes (display electrodes) X and Y in pair for generating lateral discharge are arranged in parallel to each other with one pair for each matrix display line L on the inner surface of a front glass substrate
40
. Each of the display electrode pairs X and Y comprises a transparent electrode
42
and a bus electrode
43
, and is covered with a dielectric layer
44
for AC driving. A protecting layer
45
comprising magnesium oxide (MgO) is provided on the surface of the dielectric layer
44
.
Address electrodes
46
for generating an address discharge are, on the other hand, arranged in parallel to each other and across the display electrode on the inner surface of a back glass substrate
41
. A dielectric layer
47
is formed on the back glass substrate
41
covering over the address electrode
46
, and a stripe-shaped barrier
48
having a height of about 150 &mgr;m as a spacer between the both substrates is provided on the surface of the dielectric layer with each of the address electrodes
46
in between. A discharge space
49
is partitioned by an adjacent pair of the barriers
48
into sub-pixels (unit light emitting areas) and regulates the size of intervals of the discharge space. Fluorescent members
50
of three colors including R (red), G (green) and B (blue) for full color display are provided in the long and thin gaps between the barriers
48
so as to cover the side walls of the barrier and the surface of the dielectric layer
47
.
The front glass substrate
40
and the back glass substrate
41
are separately formed, and finally stacked together by means of a sealing member so as to provide a discharge space
49
in between. A discharge gas (for example, a mixed gas of neon and xenon) exciting the fluorescent members
50
under a pressure of about several hundred of Torr by irradiating ultraviolet rays upon discharging.
FIGS. 7A and 7B
are sectional views illustrating the stacking process of a front glass substrate
52
and a back glass substrate
57
.
FIGS. 7A and 7B
represent the states before and after stacking, respectively. A sealing member
62
for sealing peripheries of the both substrates is previously formed on a dielectric layer
59
on the back substrate
57
as shown in
FIG. 7A
, and then is aligned to the periphery of the opposing dielectric layer
54
on the front substrate
52
.
More specifically, the sealing member
62
is formed by coating a low-melting-point glass paste by screen printing into a frame shape on the dielectric layer
59
of the back substrate
57
on which the address electrodes
58
, the dielectric layer
59
, the barriers
60
and the fluorescent members
61
are already formed, and then applying a heat treatment (baking). The sealing member
62
before baking is configured so as to be slightly higher than the barrier
60
to press the opposing dielectric layer
54
on the front substrate
52
.
The peripheral portion
54
a
outside the display region of the dielectric layer
54
on the front substrate
52
is not covered with the protecting layer
56
, and a bonding portion of the sealing member
62
is formed so as to be aligned with this peripheral portion not covered with the protecting layer.
After stacking the glass substrate
52
on top of the glass substrate
57
as shown by arrows, pressure is applied to the glass substrates with heat-treatment, consequently, the sealing member
62
softens to bond the substrates
52
and
59
together to complete sealing.
FIG. 7B
shows the sealed state.
The sealing member
62
is formed between the dielectric layers
54
and
59
of the respective substrates
52
and
57
in order to achieve a high sealing property. More specifically, the dielectric layers
54
and
59
can improve adhesivity because of their fusibility with the sealing member
62
, comprising a low-melting-point glass. The dielectric layers
54
and
59
also can ensure flatness by absorbing the surface irregularities on the substrates generated by the display electrode
53
and the address electrode
58
. A synergetic action of these effects makes it possible to achieve a highly accurate sealing.
After sealing the both glass substrates
52
and
57
as described above, the discharge space is evacuated and cleaned, and then a discharge gas is sealed in to complete the PDP.
FIG. 8
is a sectional view for explaining the problems involved in the conventional art, with an enlarged sealed portion: the same components as in
FIG. 7B
are assigned the same reference numerals.
The sealing member
62
is formed, as described above, by coating a low-melting-point glass paste and baking the same. After baking, the top portion (leading end portion) becomes a solid body having a rounded shape under the effect of surface tension.
The dielectric layer
54
on the front substrate with which the sealing member
62
comes into contact must have a thickness of several tens of &mgr;m to permit storage of the electric charge resulting from discharge for AC driving.
Upon stacking the both glass substrates, therefore, force is concentrated on the leading end portion of the sealing member
62
, and fine flaws may be produced in the dielectric layer
54
on the front glass substrate, at locations corresponding to the leading end portion. Heat treatment in this state produces a stress in the dielectric layer
54
caused by a difference in respective thermal expansion coefficients of the dielectric layer
54
and the front glass substrate
52
. This causes production of cracks from fine flaws previously produced in the dielectric layer
54
, thus posing a problem of formation of a damaged portion
54
a
as shown in FIG.
8
. Since large thickness leads to a large stress produced in the dielectric layer, the risk of crack occurrence becomes higher when the dielectric layer is made thicker to achieve a lower power consumption for AC driving.
Because the discharge gas
63
is sealed-under a predetermined pressure in the discharge space
49
sealed with the sealing member
62
, a damage to sealing property caused by the damaged portion
54
a
would result in leakage of the discharge gas as shown by the arrows. Leakage of the discharge gas
63
causes deterioration of discharge property with time, thus resulting in a fatal defect of the PDP.
Even when roundness of the leading end of the sealing member
62
is ground off, a force is concentrated on the contact portion of the sealing member
62
and the dielectric layer
54
, thus resulting in similar problems.
SUMMARY OF THE INVENTION
One aspect of the present invention comprises a plasma display panel having a pair of opposing flat glass panels sealed air-tightly with each other in the peripheral region by a sealing member with a discharging space between the opposing surfaces of the pair of glass panels. At least one of the opposing surfaces has a discharging electrode in the display region thereon. Each of the opposing surfaces of the flat glass panels is coated with a respective dielectric layer with which the sealing member is in contact. The dielectric layer in the sealing portion of the flat glass panel having the discharging electrode is thinner than that in the display
Ebihara Kazumi
Horio Kenji
Osaka Yoshinori
Fujitsu Limited
Ramsey Kenneth J.
Staas & Halsey , LLP
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