Plasma display panel driving method and plasma display panel dev

Details Plasma display panel driving method and plasma display panel dev Plasma display panel driving method and plasma display panel dev

1997-01-13

1998-12-29

Lee, Benny

Electric lamp and discharge devices: systems

Plural power supplies

Plural cathode and/or anode load device

3151694, 345204, 345215, G09G 310

Patent

active

058545409

ABSTRACT:
A method of driving a plasma display panel for generating picture or image with high quality while suppressing luminance to a low level in the display in black. One field for image display is composed of at least two different types of subfields first and second subfields. In the first subfield (subfield A), a reset period is provided in which after a priming pulse (Pp) having a voltage value and a pulse width has been applied between X- and Y-row electrodes for causing discharge to occur in all of pixels, then the voltage applied between both the electrodes is set to zero for erasing wall charge after the discharge of all of the pixels, while in the second subfield (subfield B), a reset period is provided in which an erasing pulse (Ep) having a voltage value and a pulse width for causing only the pixels discharged in the preceding subfield to be discharged has been applied for allowing only the pixels discharged in the preceding subfield to be discharged, the wall charge is erased by setting to zero the voltage applied between the X- and Y-row electrodes.

REFERENCES:
patent: 5237315 (1993-08-01), Gay et al.
patent: 5247288 (1993-09-01), Warren et al.
patent: 5250936 (1993-10-01), Warren et al.
patent: 5410219 (1995-04-01), Takei et al.
patent: 5420602 (1995-05-01), Kanazawa

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