Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2005-01-13
2008-03-18
Shankar, Vijay (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S062000, C345S063000, C345S066000, C345S068000
Reexamination Certificate
active
07345655
ABSTRACT:
Barrier ribs are disposed on a back substrate so as to separate main discharge cells formed of a display electrode pair and a data electrode which face each other and priming discharge cells formed of a clearance between two adjacent scan electrodes. The top parts of the barrier ribs are formed so as to abut on a front substrate. In a driving method, in an odd-numbered line writing time period, scan pulse Va is sequentially applied to odd-numbered scan electrode SCpand voltage Vq is applied to even-numbered scan electrode SCp+1to cause priming discharge between scan electrode SCp+1and odd-numbered scan electrode SCp. In an even-numbered line writing time period, scan pulse Va is sequentially applied to even-numbered scan electrode SCp+1and voltage Vq is applied to odd-numbered scan electrode SCpto cause priming discharge between scan electrode SCpand even-numbered scan electrode SCp+1.
REFERENCES:
patent: 6492770 (2002-12-01), Amemiya et al.
patent: 6531994 (2003-03-01), Nagano
patent: 2001/0011871 (2001-08-01), Amemiya et al.
patent: 2005/0215159 (2005-09-01), Yamauchi et al.
patent: 2006/0284795 (2006-12-01), Akiyama et al.
patent: 2006/0284796 (2006-12-01), Kigo et al.
patent: 1 003 149 (2000-05-01), None
patent: 8-162026 (1996-06-01), None
patent: 9-160525 (1997-06-01), None
patent: 9-319328 (1997-12-01), None
patent: 10-39834 (1998-02-01), None
patent: 10-63222 (1998-03-01), None
patent: 2002-150949 (2002-05-01), None
patent: 2004-29412 (2004-01-01), None
J. S. Choi et al., “High Luminous Efficiency of PDP with ‘Twin Cell Structure’”, IDW '02, pp. 769-772.
Hashiguchi Jumpei
Murakoso Tomohiro
Ogawa Kenji
Tachibana Hiroyuki
Wakabayashi Toshikazu
Shankar Vijay
Wenderoth , Lind & Ponack, L.L.P.
LandOfFree
Plasma display panel drive method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Plasma display panel drive method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Plasma display panel drive method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3969049